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[60.242.179.244]) by smtp.gmail.com with ESMTPSA id h123sm189145pgc.36.2017.06.26.06.32.09 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 26 Jun 2017 06:32:10 -0700 (PDT) From: Jonathan Liu To: Maxime Ripard , Chen-Yu Tsai , Rob Herring , Mark Rutland , Russell King Subject: [PATCH] ARM: dts: sun4i: Add A10 LCD0 RGB888 pins Date: Mon, 26 Jun 2017 23:32:37 +1000 Message-Id: <20170626133237.22664-1-net147@gmail.com> X-Mailer: git-send-email 2.13.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170626_063232_005295_CC9BFD49 X-CRM114-Status: UNSURE ( 8.92 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, Jonathan Liu , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The LCD0 controller on the A10 can do RGB output up to 8 bits per channel. Add the pins for RGB888 output. Signed-off-by: Jonathan Liu --- arch/arm/boot/dts/sun4i-a10.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index b63668ece151..6fa2622a78c2 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -1022,6 +1022,17 @@ function = "ir1"; }; + lcd0_rgb888_pins: lcd0_rgb888@0 { + pins = "PD0", "PD1", "PD2", "PD3", + "PD4", "PD5", "PD6", "PD7", + "PD8", "PD9", "PD10", "PD11", + "PD12", "PD13", "PD14", "PD15", + "PD16", "PD17", "PD18", "PD19", + "PD20", "PD21", "PD22", "PD23", + "PD24", "PD25", "PD26", "PD27"; + function = "lcd0"; + }; + mmc0_pins_a: mmc0@0 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";