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h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pgmeAzK0xWRq3zzBT5tLh84sIiwDG/hYtHSt3p9wmd8=; b=hFv2ibEuI8mPR0QJzYYJILlUP83oNPhJ6nVMrL9F8ukr+bpGVTX8n6wtmOF5AX7Pph htlFNpj81o7vJYmNWEzE4u1P2SrYiaolwDQv1yOWv22tRGlKBz++myvfWHup7RxGei4l RW5FYY0ZN43QLvd2cu5BWflLARcCDlQTUQj0/bW8o5erIw1KaB3kWhZqUs0ocb888EOo CWYMFyHlRhF8ihoq4Nx1XbQpXDIRQ5PijoHN2w6/pLTDAWfJHdsttWsCjczslxrFsbuz bgLMfJLk3IK4dW7JiLGXnmQuQnIEkFZgX7IYEeJZ/sjoMh4fWtFWiyKYZAmxP6zT5wGU kWGg== X-Gm-Message-State: AKS2vOxWgznvnNFLsPBN673NSOKKxKkGvioECU8KMw8YLARr6oqhdZnO eqcdcm1s9F5GAw== X-Received: by 10.55.18.225 with SMTP id 94mr63833614qks.251.1499455277608; Fri, 07 Jul 2017 12:21:17 -0700 (PDT) Received: from stb-bld-02.irv.broadcom.com ([192.19.255.250]) by smtp.gmail.com with ESMTPSA id n8sm3437132qtc.5.2017.07.07.12.21.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jul 2017 12:21:17 -0700 (PDT) From: Doug Berger To: Thomas Gleixner Subject: [PATCH 2/6] irqchip/tango: Use irq_gc_mask_disable_and_ack_set Date: Fri, 7 Jul 2017 12:20:12 -0700 Message-Id: <20170707192016.13001-3-opendmb@gmail.com> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170707192016.13001-1-opendmb@gmail.com> References: <20170707192016.13001-1-opendmb@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170707_122140_472771_835AE3EB X-CRM114-Status: GOOD ( 11.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Doug Berger , Jason Cooper , Marc Zyngier , "open list:IRQCHIP DRIVERS" , Florian Fainelli , "open list:ARM/TANGO ARCHITECTURE" , Marc Gonzalez MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Florian Fainelli Any usage of the irq_gc_mask_disable_reg_and_ack() function should be replaced with either the irq_gc_mask_disable_and_ack_set() or the irq_gc_mask_set_and_ack_set() function depending on which corrects the bugs in irq_gc_mask_disable_reg_and_ack() for a given usage. For the Tango irqchip driver, irq_gc_mask_disable_and_ack_set() seems to be what is intended, so use it. Signed-off-by: Florian Fainelli Signed-off-by: Doug Berger Acked-by: Mans Rullgard --- drivers/irqchip/irq-tango.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-tango.c b/drivers/irqchip/irq-tango.c index bdbb5c0ff7fe..0c085303a583 100644 --- a/drivers/irqchip/irq-tango.c +++ b/drivers/irqchip/irq-tango.c @@ -141,7 +141,7 @@ static void __init tangox_irq_init_chip(struct irq_chip_generic *gc, for (i = 0; i < 2; i++) { ct[i].chip.irq_ack = irq_gc_ack_set_bit; ct[i].chip.irq_mask = irq_gc_mask_disable_reg; - ct[i].chip.irq_mask_ack = irq_gc_mask_disable_reg_and_ack; + ct[i].chip.irq_mask_ack = irq_gc_mask_disable_and_ack_set; ct[i].chip.irq_unmask = irq_gc_unmask_enable_reg; ct[i].chip.irq_set_type = tangox_irq_set_type; ct[i].chip.name = gc->domain->name;