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h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=J0yjtnyNG+zG1tIECzgr+9YvpBG2F0oQ0A4xS/9ZsTE=; b=qu6S1k7Do/3+DiPjcP/yxtaYVrtw+JCh40t2tlUNDSECXRRerVWBrtLepPas49FUyA 9PMOmGgInkR3EffmiK7sTEROjigIVStLh53sIz/k7iInDvUGMkwivPkogfBpkWwRpP+e 0owjxoW6MZ81ZYhVO9N8lnsoDSbYzJhiNWsl77XeY2dAG9bqtRAT/uijL2asyaLvsDOR HsEeqqi7tcnFjlARvadSDcG0hwranf4uVk36sZCJ8DGSwM/DQeDv/FY+RzLCQk3SOmVL kon3sBWPGRRwYgYKrPUu5YStdC/Ec9mnYdEpYwfG9gR8nXf8TMcRE1aNUAazANsdLGqV 2TlA== X-Gm-Message-State: AIVw1131LJk7Jmgr5odahEmgbQk+ceejONGXZ4/ksp6IQzLf2fDN28wc 4PhfYQX38cws4g== X-Received: by 10.55.6.149 with SMTP id 143mr1606408qkg.49.1500491323040; Wed, 19 Jul 2017 12:08:43 -0700 (PDT) Received: from stb-bld-02.irv.broadcom.com ([192.19.255.250]) by smtp.gmail.com with ESMTPSA id 73sm518082qkx.30.2017.07.19.12.08.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 19 Jul 2017 12:08:42 -0700 (PDT) From: Doug Berger To: Thomas Gleixner Subject: [PATCH v2 2/6] irqchip/tango: Use irq_gc_mask_disable_and_ack_set Date: Wed, 19 Jul 2017 12:07:30 -0700 Message-Id: <20170719190734.18566-3-opendmb@gmail.com> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170719190734.18566-1-opendmb@gmail.com> References: <20170719190734.18566-1-opendmb@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170719_120905_240568_5125F345 X-CRM114-Status: GOOD ( 13.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Sebastian Frias , Doug Berger , Jason Cooper , linux-mips@linux-mips.org, Boris Brezillon , Marc Zyngier , Bartosz Golaszewski , Kevin Cernekee , linux-kernel@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, Gregory Fong , Brian Norris , linux-arm-kernel@lists.infradead.org, Marc Gonzalez MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Florian Fainelli The only usage of the irq_gc_mask_disable_reg_and_ack() function is by the Tango irqchip driver. This usage is replaced by the irq_gc_mask_disable_and_ack_set() function since it provides the intended functionality. Fixes: 4bba66899ac6 ("irqchip/tango: Add support for Sigma Designs SMP86xx/SMP87xx interrupt controller") Signed-off-by: Florian Fainelli Acked-by: Mans Rullgard Signed-off-by: Doug Berger --- drivers/irqchip/irq-tango.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-tango.c b/drivers/irqchip/irq-tango.c index bdbb5c0ff7fe..0c085303a583 100644 --- a/drivers/irqchip/irq-tango.c +++ b/drivers/irqchip/irq-tango.c @@ -141,7 +141,7 @@ static void __init tangox_irq_init_chip(struct irq_chip_generic *gc, for (i = 0; i < 2; i++) { ct[i].chip.irq_ack = irq_gc_ack_set_bit; ct[i].chip.irq_mask = irq_gc_mask_disable_reg; - ct[i].chip.irq_mask_ack = irq_gc_mask_disable_reg_and_ack; + ct[i].chip.irq_mask_ack = irq_gc_mask_disable_and_ack_set; ct[i].chip.irq_unmask = irq_gc_unmask_enable_reg; ct[i].chip.irq_set_type = tangox_irq_set_type; ct[i].chip.name = gc->domain->name;