From patchwork Tue Aug 15 19:02:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paul Burton X-Patchwork-Id: 9902395 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 98B6A6028A for ; Tue, 15 Aug 2017 19:05:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 89C3E288D8 for ; Tue, 15 Aug 2017 19:05:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7B1BA288DE; Tue, 15 Aug 2017 19:05:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1F940288D8 for ; Tue, 15 Aug 2017 19:05:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0k2HzsiDZfc5Rwcc7q411/5mo/q+D9CdorwVwPKtZlo=; b=gg/cU+htPfwPtL 7AAFlDHxF+GCpopf+QfQnLzt1GZtzPpZpyZZbqFUYRVig8mLdblYXrT+pdRZD7pWYD2ofAY04zRJ4 qjgY5oRhbOdZFQMdO74NS1F7n/BfX+RIS43fe/TkpNKEEgItjOYki7ounJivp9Rwwu+bqyxKNIa8h Z5+/I/tZeF7BVNNT5c9MODyYHDFnPhFeHxkDe0tAkV43jQfjHdLxRmWQtJPruSIM0/dCxkFXXVsJr CJ3gWAel2bK2IP4YQUGB0TEpsrTyxC5+g7uDpaEwTK2qAwjhJMDwFhcMOoH2YVYs+dX9ozHvb8eHF OL51krp101S2JKNm6i5A==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dhh97-0006ba-Mg; Tue, 15 Aug 2017 19:04:57 +0000 Received: from mailapp01.imgtec.com ([195.59.15.196]) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dhh93-0006XS-Hb for linux-arm-kernel@lists.infradead.org; Tue, 15 Aug 2017 19:04:55 +0000 Received: from hhmail02.hh.imgtec.org (unknown [10.100.10.20]) by Forcepoint Email with ESMTPS id 4ACB43A879F2; Tue, 15 Aug 2017 20:04:26 +0100 (IST) Received: from localhost (10.20.1.88) by hhmail02.hh.imgtec.org (10.100.10.21) with Microsoft SMTP Server (TLS) id 14.3.294.0; Tue, 15 Aug 2017 20:04:29 +0100 From: Paul Burton To: Bjorn Helgaas , Subject: [PATCH v7 5/8] PCI: xilinx-nwl: Translate INTx range to hwirqs 0-3 Date: Tue, 15 Aug 2017 12:02:20 -0700 Message-ID: <20170815190223.18807-6-paul.burton@imgtec.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170815190223.18807-1-paul.burton@imgtec.com> References: <20170815190223.18807-1-paul.burton@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [10.20.1.88] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170815_120453_812740_75A17FB8 X-CRM114-Status: GOOD ( 12.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?S=C3=B6ren=20Brinkmann?= , Michal Simek , Paul Burton , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The devicetree binding documentation for the Xilinx NWL PCIe root port bridge shows an example which uses an interrupt-map property to map PCI INTx interrupts to hardware IRQ numbers 1-4. The driver creates an IRQ domain with size 4, which therefore covers the hwirq range 0-3. This means that if we attempt to make use of the INTD interrupt then we're likely to hit a WARN() in irq_domain_associate() because INTD, or hwirw=4, is outside of the range covered by the IRQ domain. irq_domain_associate() will then return -EINVAL and we'll be unable to make use of INTD. Fix this by making use of the pci_irqd_intx_xlate() helper function to translate the 1-4 range used in the DT to a 0-3 range used within the driver, and stop adding 1 to decoded hwirq numbers. Whilst cleaning up INTx handling we make use of the new PCI_NUM_INTX macro & drop the custom INTX definitions. Signed-off-by: Paul Burton Cc: Bjorn Helgaas Cc: Michal Simek Cc: "Sören Brinkmann" Cc: linux-arm-kernel@lists.infradead.org Cc: linux-pci@vger.kernel.org --- I have only build tested this. The problem is identical to that in the pcie-xilinx driver, which is fixed similarly in an earlier patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/pci/host/pcie-xilinx-nwl.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c index eec641a34fc5..573847f4b9bc 100644 --- a/drivers/pci/host/pcie-xilinx-nwl.c +++ b/drivers/pci/host/pcie-xilinx-nwl.c @@ -133,7 +133,6 @@ #define CFG_DMA_REG_BAR GENMASK(2, 0) #define INT_PCI_MSI_NR (2 * 32) -#define INTX_NUM 4 /* Readin the PS_LINKUP */ #define PS_LINKUP_OFFSET 0x00000238 @@ -334,9 +333,8 @@ static void nwl_pcie_leg_handler(struct irq_desc *desc) while ((status = nwl_bridge_readl(pcie, MSGF_LEG_STATUS) & MSGF_LEG_SR_MASKALL) != 0) { - for_each_set_bit(bit, &status, INTX_NUM) { - virq = irq_find_mapping(pcie->legacy_irq_domain, - bit + 1); + for_each_set_bit(bit, &status, PCI_NUM_INTX) { + virq = irq_find_mapping(pcie->legacy_irq_domain, bit); if (virq) generic_handle_irq(virq); } @@ -436,6 +434,7 @@ static int nwl_legacy_map(struct irq_domain *domain, unsigned int irq, static const struct irq_domain_ops legacy_domain_ops = { .map = nwl_legacy_map, + .xlate = pci_irqd_intx_xlate, }; #ifdef CONFIG_PCI_MSI @@ -559,7 +558,7 @@ static int nwl_pcie_init_irq_domain(struct nwl_pcie *pcie) } pcie->legacy_irq_domain = irq_domain_add_linear(legacy_intc_node, - INTX_NUM, + PCI_NUM_INTX, &legacy_domain_ops, pcie);