| Message ID | 20170816045053.15492-4-vigneshr@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Aug 16, 2017 at 10:20:51AM +0530, Vignesh R wrote: > Cadence QSPI IP has a adapted loop-back circuit which can be enabled by > setting BYPASS field to 0 in READCAPTURE register. It enables use of > QSPI return clock to latch the data rather than the internal QSPI > reference clock. For high speed operations, adapted loop-back circuit > using QSPI return clock helps to increase data valid window. > > Add DT parameter cdns,rclk-en to help enable adapted loop-back circuit > for boards which do have QSPI return clock provided. Update binding > documentation for the same. > > Signed-off-by: Vignesh R <vigneshr@ti.com> > --- > Documentation/devicetree/bindings/mtd/cadence-quadspi.txt | 3 +++ > 1 file changed, 3 insertions(+) Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt index 7dbe3bd9ac56..bb2075df9b38 100644 --- a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt @@ -16,6 +16,9 @@ Required properties: Optional properties: - cdns,is-decoded-cs : Flag to indicate whether decoder is used or not. +- cdns,rclk-en : Flag to indicate that QSPI return clock is used to latch + the read data rather than the QSPI clock. Make sure that QSPI return + clock is populated on the board before using this property. Optional subnodes: Subnodes of the Cadence Quad SPI controller are spi slave nodes with additional
Cadence QSPI IP has a adapted loop-back circuit which can be enabled by setting BYPASS field to 0 in READCAPTURE register. It enables use of QSPI return clock to latch the data rather than the internal QSPI reference clock. For high speed operations, adapted loop-back circuit using QSPI return clock helps to increase data valid window. Add DT parameter cdns,rclk-en to help enable adapted loop-back circuit for boards which do have QSPI return clock provided. Update binding documentation for the same. Signed-off-by: Vignesh R <vigneshr@ti.com> --- Documentation/devicetree/bindings/mtd/cadence-quadspi.txt | 3 +++ 1 file changed, 3 insertions(+)