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[163.172.81.188]) by smtp.googlemail.com with ESMTPSA id z39sm604792wrz.61.2017.08.28.07.29.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 28 Aug 2017 07:29:20 -0700 (PDT) From: Jerome Brunet To: Ulf Hansson , Kevin Hilman , Carlo Caione Subject: [PATCH v3 02/13] mmc: meson-gx: cfg init overwrite values Date: Mon, 28 Aug 2017 16:29:04 +0200 Message-Id: <20170828142915.27020-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20170828142915.27020-1-jbrunet@baylibre.com> References: <20170828142915.27020-1-jbrunet@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170828_072943_629730_588B5036 X-CRM114-Status: GOOD ( 12.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jerome Brunet MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP cfg init function overwrite values set in the clk init function Remove the cfg pokes from the clk init. Actually, trying to use the CLK_AUTO, like initially tried in clk_init, would break the card initialization Reviewed-by: Kevin Hilman Signed-off-by: Jerome Brunet --- drivers/mmc/host/meson-gx-mmc.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c index d2de5c11cdce..7d14d382cb1c 100644 --- a/drivers/mmc/host/meson-gx-mmc.c +++ b/drivers/mmc/host/meson-gx-mmc.c @@ -337,7 +337,7 @@ static int meson_mmc_clk_init(struct meson_host *host) int i, ret = 0; const char *mux_parent_names[MUX_CLK_NUM_PARENTS]; const char *clk_div_parents[1]; - u32 clk_reg, cfg; + u32 clk_reg; /* init SD_EMMC_CLOCK to sane defaults w/min clock rate */ clk_reg = 0; @@ -402,12 +402,6 @@ static int meson_mmc_clk_init(struct meson_host *host) if (WARN_ON(PTR_ERR_OR_ZERO(host->cfg_div_clk))) return PTR_ERR(host->cfg_div_clk); - /* Ensure clock starts in "auto" mode, not "always on" */ - cfg = readl(host->regs + SD_EMMC_CFG); - cfg &= ~CFG_CLK_ALWAYS_ON; - cfg |= CFG_AUTO_CLK; - writel(cfg, host->regs + SD_EMMC_CFG); - ret = clk_prepare_enable(host->cfg_div_clk); if (ret) return ret; @@ -956,6 +950,9 @@ static int meson_mmc_probe(struct platform_device *pdev) if (ret) goto err_core_clk; + /* set config to sane default */ + meson_mmc_cfg_init(host); + /* Stop execution */ writel(0, host->regs + SD_EMMC_START); @@ -964,9 +961,6 @@ static int meson_mmc_probe(struct platform_device *pdev) writel(IRQ_EN_MASK, host->regs + SD_EMMC_STATUS); writel(IRQ_EN_MASK, host->regs + SD_EMMC_IRQ_EN); - /* set config to sane default */ - meson_mmc_cfg_init(host); - ret = devm_request_threaded_irq(&pdev->dev, irq, meson_mmc_irq, meson_mmc_irq_thread, IRQF_SHARED, NULL, host);