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bh=OBiEo9AvaJ6PZ6PEpoG3AlC9aOGcZoHw4Tb90DUCjtw=; b=Co4S3jBvJZVT2kyZZVCj2CJtupZe6gnK8sK9tOmExPxepYWI0n00ypEk9yNRsURVvw ChB/OJy8KDN1gXwAD4iRWotKslR5vcFIWyQQ/xf63ivZnlnLrEGOF+TXtQhUCqbIpi0i 4Tivl4mzVXSMXnHgnM2CPYvNvDKjhMV0U6M5LkWIl36JahBfFewcB9uviinrOpbQ0ipG /UbQY4JWrFRBjrY3QgYZcnU/DB74WWIUPSllcTU9IYIRYF+ym9xjeGLNN0avTof9Y3Uj kv3a7qrrUnS3zv0BV5KU9djFMr1BNLCRsoeVQd8eoHX5JeVI9nUME3MivEzSSripkUI/ SsxA== X-Gm-Message-State: AHYfb5gSlMeBNTMN7WyeaNvyP7OSnY6DaJ0IvhrnqBHUq4dykPe0V33I kMWYi7+X1E4KN8qo X-Google-Smtp-Source: ADKCNb6KR6AIWJ5PrEK3iIKOjpiPvrFniYcZyHOJIg80WKXYggDC9dVq37i+YnHwAGD7vgwfYRKRyg== X-Received: by 10.28.48.23 with SMTP id w23mr674090wmw.176.1504187551472; Thu, 31 Aug 2017 06:52:31 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id z1sm147959wmz.45.2017.08.31.06.52.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 31 Aug 2017 06:52:30 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Subject: [PATCH v3 1/9] ARM64: dts: meson-gx: Use correct mmc clock source 0 Date: Thu, 31 Aug 2017 15:52:18 +0200 Message-Id: <20170831135226.19784-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20170831135226.19784-1-jbrunet@baylibre.com> References: <20170831135226.19784-1-jbrunet@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170831_145253_648945_42569469 X-CRM114-Status: GOOD ( 10.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jerome Brunet MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Now that the clock source 0 is properly described in the CCF, use it instead of assuming the default value (xtal) Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 6 +++--- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 52f1687e7a09..8f0c0cb02157 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -661,21 +661,21 @@ &sd_emmc_a { clocks = <&clkc CLKID_SD_EMMC_A>, - <&xtal>, + <&clkc CLKID_SD_EMMC_A_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; }; &sd_emmc_b { clocks = <&clkc CLKID_SD_EMMC_B>, - <&xtal>, + <&clkc CLKID_SD_EMMC_B_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; }; &sd_emmc_c { clocks = <&clkc CLKID_SD_EMMC_C>, - <&xtal>, + <&clkc CLKID_SD_EMMC_C_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index d6876e64979e..829d84db5fc5 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -603,21 +603,21 @@ &sd_emmc_a { clocks = <&clkc CLKID_SD_EMMC_A>, - <&xtal>, + <&clkc CLKID_SD_EMMC_A_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; }; &sd_emmc_b { clocks = <&clkc CLKID_SD_EMMC_B>, - <&xtal>, + <&clkc CLKID_SD_EMMC_B_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; }; &sd_emmc_c { clocks = <&clkc CLKID_SD_EMMC_C>, - <&xtal>, + <&clkc CLKID_SD_EMMC_C_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; };