From patchwork Thu Sep 14 12:57:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 9953029 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 042C8602C9 for ; Thu, 14 Sep 2017 13:09:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BA04728CD3 for ; Thu, 14 Sep 2017 13:09:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AD16128DF0; Thu, 14 Sep 2017 13:09:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3CF3028CD3 for ; Thu, 14 Sep 2017 13:09:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5FWgME39ouxxaXJsMmtnZymYU29mSWUzJZTpC48QhbM=; b=sPC+cidLquprkx oeMeYnYNxNWh/tvXWUNQHIC4qTMhCqi1TkLhn1A2a7s2K1ZUPIkgK9nKNhYnkg+7tsy/KlGxJEmOl eqBMrNms9FfZnHbeXbS4XEjqUJkfINBH2h0gBKyvliLNuIVeIx79P1nRkzQ63fiw1yXdWrRz4Kyu4 PpLbxx59zVV0WB48r8WHNwlUOb8tqEhoMmjSSeUg7BFNfWZGEG553Q5MzmNhyfm5a/yFNpQ3yKpjJ BM5JRDMAiW/IbEGJ8xmlr4NpNfG1UJSGeVThCtI/v1uoKIvPHY1kP7R9S1AIGWlq3h6CrPPjPHJqm p2ZcvgC9WK5/LVq8tIgQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dsTtf-0005IO-Nh; Thu, 14 Sep 2017 13:09:35 +0000 Received: from szxga04-in.huawei.com ([45.249.212.190]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dsTlh-0000y7-Lf for linux-arm-kernel@lists.infradead.org; Thu, 14 Sep 2017 13:01:33 +0000 Received: from 172.30.72.59 (EHLO DGGEMS413-HUB.china.huawei.com) ([172.30.72.59]) by dggrg04-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id DHF34348; Thu, 14 Sep 2017 21:00:54 +0800 (CST) Received: from S00345302A-PC.china.huawei.com (10.212.247.163) by DGGEMS413-HUB.china.huawei.com (10.3.19.213) with Microsoft SMTP Server id 14.3.301.0; Thu, 14 Sep 2017 21:00:43 +0800 From: Shameer Kolothum To: , , , , , , , Subject: [PATCH v7 3/5] iommu/of: Add msi address regions reservation helper Date: Thu, 14 Sep 2017 13:57:54 +0100 Message-ID: <20170914125756.14836-4-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20170914125756.14836-1-shameerali.kolothum.thodi@huawei.com> References: <20170914125756.14836-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.212.247.163] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090204.59BA7D86.0122, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 8efd3143354b48dbe223742ebc3bebbe X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170914_060122_536948_AA47E547 X-CRM114-Status: GOOD ( 14.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, gabriele.paoloni@huawei.com, john.garry@huawei.com, linuxarm@huawei.com, Shameer Kolothum , linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org, wangzhou1@hisilicon.com, guohanjun@huawei.com, linux-arm-kernel@lists.infradead.org, devel@acpica.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: John Garry On some platforms msi-controller address regions have to be excluded from normal IOVA allocation in that they are detected and decoded in a HW specific way by system components and so they cannot be considered normal IOVA address space. Add a helper function that retrieves msi address regions through device tree msi mapping, so that these regions will not be translated by IOMMU and will be excluded from IOVA allocations. Signed-off-by: John Garry Signed-off-by: Shameer Kolothum --- drivers/iommu/of_iommu.c | 117 +++++++++++++++++++++++++++++++++++++++++++++++ include/linux/of_iommu.h | 10 ++++ 2 files changed, 127 insertions(+) diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index 8cb6082..f2d1a76 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -246,6 +247,122 @@ const struct iommu_ops *of_iommu_configure(struct device *dev, return ops; } +/** + * of_iommu_msi_get_resv_regions - Reserved region driver helper + * @dev: Device from iommu_get_resv_regions() + * @list: Reserved region list from iommu_get_resv_regions() + * + * Returns: Number of reserved regions on success (0 if no associated + * msi parent), appropriate error value otherwise. + */ +int of_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head) +{ + int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO; + struct iommu_resv_region *region; + struct device_node *np; + struct resource res; + int i, resv = 0, mappings = 0; + + if (dev_is_pci(dev)) { + struct device *dma_dev, *bridge; + struct of_phandle_args iommu_spec; + struct pci_dev *pdev = to_pci_dev(dev); + int err, count; + u32 rid, map_mask; + const __be32 *msi_map; + + bridge = pci_get_host_bridge_device(pdev); + dma_dev = bridge->parent; + pci_put_host_bridge_device(bridge); + + if (!dma_dev->of_node) + return -ENODEV; + + iommu_spec.args_count = 1; + np = iommu_spec.np = dma_dev->of_node; + pci_for_each_dma_alias(pdev, __get_pci_rid, &iommu_spec); + + rid = iommu_spec.args[0]; + if (!of_property_read_u32(np, "msi-map-mask", &map_mask)) + rid &= map_mask; + + msi_map = of_get_property(np, "msi-map", NULL); + if (!msi_map) + return -ENODEV; + + mappings = of_count_phandle_with_args(np, "msi-map", NULL) / 4; + + for (i = 0, count = mappings; i < count; i++, msi_map += 4) { + struct device_node *msi_node; + u32 rid_base, rid_len, phandle; + + rid_base = be32_to_cpup(msi_map + 0); + phandle = be32_to_cpup(msi_map + 1); + rid_len = be32_to_cpup(msi_map + 3); + + /* check rid is within range */ + if (rid < rid_base || rid >= rid_base + rid_len) { + mappings--; + continue; + } + + msi_node = of_find_node_by_phandle(phandle); + if (!msi_node) + return -ENODEV; + + err = of_address_to_resource(msi_node, 0, &res); + of_node_put(msi_node); + if (err) + return err; + + region = iommu_alloc_resv_region(res.start, + resource_size(&res), + prot, IOMMU_RESV_MSI); + if (region) { + list_add_tail(®ion->list, head); + resv++; + } + } + } else if (dev->of_node) { + struct device_node *msi_np; + int index = 0; + int tuples; + + np = dev->of_node; + + tuples = of_count_phandle_with_args(np, "msi-parent", NULL); + + while (index < tuples) { + int msi_cells = 0; + int err; + + msi_np = of_parse_phandle(np, "msi-parent", index); + if (!msi_np) + return -ENODEV; + + of_property_read_u32(msi_np, "#msi-cells", &msi_cells); + + err = of_address_to_resource(msi_np, 0, &res); + of_node_put(msi_np); + if (err) + return err; + + mappings++; + + region = iommu_alloc_resv_region(res.start, + resource_size(&res), + prot, IOMMU_RESV_MSI); + if (region) { + list_add_tail(®ion->list, head); + resv++; + } + index += 1 + msi_cells; + } + } + + return (resv == mappings) ? resv : -ENODEV; +} + static int __init of_iommu_init(void) { struct device_node *np; diff --git a/include/linux/of_iommu.h b/include/linux/of_iommu.h index 13394ac..9267772 100644 --- a/include/linux/of_iommu.h +++ b/include/linux/of_iommu.h @@ -14,6 +14,9 @@ extern int of_get_dma_window(struct device_node *dn, const char *prefix, extern const struct iommu_ops *of_iommu_configure(struct device *dev, struct device_node *master_np); +extern int of_iommu_msi_get_resv_regions(struct device *dev, + struct list_head *head); + #else static inline int of_get_dma_window(struct device_node *dn, const char *prefix, @@ -29,6 +32,13 @@ static inline const struct iommu_ops *of_iommu_configure(struct device *dev, return NULL; } +static int of_iommu_msi_get_resv_regions(struct device *dev, + struct list_head *head) +{ + return -ENODEV; +} + + #endif /* CONFIG_OF_IOMMU */ extern struct of_device_id __iommu_of_table;