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[90.118.159.96]) by smtp.googlemail.com with ESMTPSA id b89sm2788580wrd.42.2017.09.21.10.24.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Sep 2017 10:24:23 -0700 (PDT) From: Corentin Labbe To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, wens@csie.org, catalin.marinas@arm.com, will.deacon@arm.com Subject: [PATCH 03/12] ARM: dts: sunxi: h3/h5: Fix node with unit name and no reg property Date: Thu, 21 Sep 2017 19:21:42 +0200 Message-Id: <20170921172151.29779-4-clabbe.montjoie@gmail.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170921172151.29779-1-clabbe.montjoie@gmail.com> References: <20170921172151.29779-1-clabbe.montjoie@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170921_102445_780051_1BB78507 X-CRM114-Status: GOOD ( 10.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Corentin Labbe , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch fix the warning "xxx has a unit name, but no reg property" by removing "@0" from such node. Signed-off-by: Corentin Labbe --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 37464d4d07f6..917e8c7434b2 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -322,7 +322,7 @@ function = "i2c2"; }; - mmc0_pins_a: mmc0@0 { + mmc0_pins_a: mmc0 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; function = "mmc0"; @@ -330,13 +330,13 @@ bias-pull-up; }; - mmc0_cd_pin: mmc0_cd_pin@0 { + mmc0_cd_pin: mmc0_cd_pin { pins = "PF6"; function = "gpio_in"; bias-pull-up; }; - mmc1_pins_a: mmc1@0 { + mmc1_pins_a: mmc1 { pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; function = "mmc1"; @@ -354,7 +354,7 @@ bias-pull-up; }; - spdif_tx_pins_a: spdif@0 { + spdif_tx_pins_a: spdif { pins = "PA17"; function = "spdif"; }; @@ -369,7 +369,7 @@ function = "spi1"; }; - uart0_pins_a: uart0@0 { + uart0_pins_a: uart0 { pins = "PA4", "PA5"; function = "uart0"; }; @@ -697,7 +697,7 @@ interrupt-controller; #interrupt-cells = <3>; - ir_pins_a: ir@0 { + ir_pins_a: ir { pins = "PL11"; function = "s_cir_rx"; };