From patchwork Tue Oct 3 05:19:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 9981717 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id ADB4360375 for ; Tue, 3 Oct 2017 05:29:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A275228748 for ; Tue, 3 Oct 2017 05:29:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 96E14287BF; Tue, 3 Oct 2017 05:29:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 116C828748 for ; Tue, 3 Oct 2017 05:29:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=OqoCwdO9H8gY4zgoQAOSxZIm8Yr42njxQYfbUC/FMDg=; b=sztG0pTByDJBmc Eevt1O2MtOHaJEZnW+mxlmvTPwmyI8Ui0pMnN82sp+qtyTux21B5XEpYz6kPgwgKtC6tM0/uEtsNo u6e8O3HtyamSMptVna0fcW1gDc/aBhkbjfSTmZolW9NbxwmMP12BQIsV10H1GukI9jYPfw9kav5jV ElUk+m1qOWrwcbN87xUOWYM8mwuXQdj0oMT8tIys5iS0mB4091VQe2sGDXvwNZ9xhpuS5bSxKgGQk Xm1O6xqBRCVZ9ev84kgZGy9fCUoKVwXMg0eoEDfflXwwORfiUw3AqMFxP9V1dVNwaJY0aRqeU5myF euq1Vp5B/DwJ0UUMYdHw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dzFlq-0004pM-Fj; Tue, 03 Oct 2017 05:29:30 +0000 Received: from fllnx209.ext.ti.com ([198.47.19.16]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dzFdd-0006vY-UQ; Tue, 03 Oct 2017 05:22:00 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v935JIa8028695; Tue, 3 Oct 2017 00:19:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1507007958; bh=uI+4+QRwxXE07v/9ifxsyixDo7u2QnF00OF4Wf40I3o=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=m7NlZ0HZ4+KLdswg43KczaHlo9769iGnkp6ZKiQuA0wtXT2JPk9zQBEvMn6t9C1h2 KV0nGkHbCtajTYePwdMMWCTh79fGp91/m7V12gVcRU4xlqGBI6kbxRLHsvp9xtHGIz jGM28HLV7aRiaaBeYViQOvEjQiZBApfbYad2tICg= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v935JDxr011076; Tue, 3 Oct 2017 00:19:13 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Tue, 3 Oct 2017 00:19:13 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Tue, 3 Oct 2017 00:19:13 -0500 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v935IxHf003069; Tue, 3 Oct 2017 00:19:10 -0500 From: Vignesh R To: Marek Vasut , Cyrille Pitchen Subject: [PATCH v4 3/6] mtd: spi-nor: cadence-quadspi: Add new binding to enable loop-back circuit Date: Tue, 3 Oct 2017 10:49:22 +0530 Message-ID: <20171003051925.8821-4-vigneshr@ti.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20171003051925.8821-1-vigneshr@ti.com> References: <20171003051925.8821-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171002_222103_117359_6EAA72D0 X-CRM114-Status: UNSURE ( 8.14 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Boris Brezillon , Vignesh R , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , linux-mtd@lists.infradead.org, Brian Norris , David Woodhouse , linux-arm-kernel Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Cadence QSPI IP has a adapted loop-back circuit which can be enabled by setting BYPASS field to 0 in READCAPTURE register. It enables use of QSPI return clock to latch the data rather than the internal QSPI reference clock. For high speed operations, adapted loop-back circuit using QSPI return clock helps to increase data valid window. Add DT parameter cdns,rclk-en to help enable adapted loop-back circuit for boards which do have QSPI return clock provided. Update binding documentation for the same. Signed-off-by: Vignesh R Acked-by: Rob Herring --- Documentation/devicetree/bindings/mtd/cadence-quadspi.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt index 7dbe3bd9ac56..bb2075df9b38 100644 --- a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt @@ -16,6 +16,9 @@ Required properties: Optional properties: - cdns,is-decoded-cs : Flag to indicate whether decoder is used or not. +- cdns,rclk-en : Flag to indicate that QSPI return clock is used to latch + the read data rather than the QSPI clock. Make sure that QSPI return + clock is populated on the board before using this property. Optional subnodes: Subnodes of the Cadence Quad SPI controller are spi slave nodes with additional