From patchwork Tue Oct 3 22:03:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 9983575 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 96858602B8 for ; Tue, 3 Oct 2017 22:03:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8C4C328717 for ; Tue, 3 Oct 2017 22:03:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 800712879C; Tue, 3 Oct 2017 22:03:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1E9A628717 for ; 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Tue, 3 Oct 2017 22:03:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1507068192; bh=pmoY1eRyPfs16xpUIqWIPf2tXNrq5bPY+4fobKMKAvE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=MXfWsKaC6jB78Pg5Whp8yKv468Vg086FRV6vWi74iQLt/ZyYM04a17v4YWbklowWz yfhN2ot36IHxTz1p92Lxqyqfpo1yvMHlfvu2flGf+dnFMwz09QTSjkAGx8EHZMKcH6 JPlV6cNmZKl3OEedqlus0tnVvX7UsEq+YBrFn+jE= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E778460723 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Tue, 3 Oct 2017 15:03:11 -0700 From: Stephen Boyd To: Timur Tabi Subject: Re: [PATCH 0/2] [v5] pinctrl: qcom: add support for sparse GPIOs Message-ID: <20171003220311.GU457@codeaurora.org> References: <1504798409-32041-1-git-send-email-timur@codeaurora.org> <20170919070422.GI3349@codeaurora.org> <1ecdf6ee-5098-15d3-f85e-66b39a6c25f9@codeaurora.org> <619f48d2-59c7-c090-4ace-9e8db9f92064@codeaurora.org> <255ad0dc-2d16-ae7f-0b45-500e23cff1a4@codeaurora.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <255ad0dc-2d16-ae7f-0b45-500e23cff1a4@codeaurora.org> User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171003_150333_735268_FB7B301F X-CRM114-Status: GOOD ( 31.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "linux-gpio@vger.kernel.org" , "linux-arm-msm@vger.kernel.org" , Linus Walleij , Bjorn Andersson , David Brown , "thierry.reding@gmail.com" , Andy Gross , Andy Shevchenko , Mika Westerberg , anjiandi@codeaurora.org, "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP On 09/22, Timur Tabi wrote: > On 09/22/2017 08:29 AM, Linus Walleij wrote: > > > >What is your response to Stephen's comment: > > > >>[Stephen Boyd] > >>Perhaps we can add another hook for our purposes here that > >>tells gpiolib that the gpio is not usable and to skip it. The > >>semantics would be clear, it's just about probing availability of > >>this pin as a gpio and doesn't mux any pins. > > >I think this kind of related to my response (after I realized it > >was not just about IRQs): > > We already have 95% of this. We can already specify individual pin > ranges, and the vast majority of the code recognizes the ranges. > There is only one small loophole, and that's in gpiochip_add_data(). > The for-loop iterates over all GPIOs: > > for (i = 0; i < chip->ngpio; i++) { > struct gpio_desc *desc = &gdev->descs[i]; > > desc->gdev = gdev; > /* > * REVISIT: most hardware initializes GPIOs as inputs > * (often with pullups enabled) so power usage is > * minimized. Linux code should set the gpio direction > * first thing; but until it does, and in case > * chip->get_direction is not set, we may expose the > * wrong direction in sysfs. > */ > > I believe the real problem is that this for-loop should be moved > from gpiochip_add_data() into some other function that is called > *after* the pin ranges are defined. We can put it in > gpiochip_add_pin_range(), maybe. > > My patch covers the loophole by adding a check inside > get_direction(). If we fix gpiochip_add_data(), I can remove that > patch. > > However, I think that change is risky and will require a lot of > testing and review. > I've run into this now on our mobile SoCs after I pull in commit 8e51533780ba ("pinctrl: qcom: add get_direction function"). Before that commit we never read each pin of the device. On our mobile SoCs we have devicetree and it feels like having that describe which pins are available and not available is half-duplicating information we would already have via consumers indicating which pins they care about. I don't see any value beyond system wide debug in figuring out the default pin configuration of a pin that doesn't have a consumer in Linux. Could we remove the pin direction finding part here in gpiochip_add_pin_range() and lazily resolve the pin direction when a pin is requested? We would need a similar check in the msm specific debugfs code where we skip pins that aren't requested. This is basically a revert of commit 72d320006177 ("gpio: set up initial state from .get_direction()"). ACPI can still describe only the pin ranges that they care about exposing, but from the devicetree side it's been working well enough to not touch pins that aren't used by anything in Linux. ---8<---- diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index cd003b74512f..673028823bc5 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1210,16 +1210,7 @@ int gpiochip_add_data(struct gpio_chip *chip, void *data) * wrong direction in sysfs. */ - if (chip->get_direction) { - /* - * If we have .get_direction, set up the initial - * direction flag from the hardware. - */ - int dir = chip->get_direction(chip, i); - - if (!dir) - set_bit(FLAG_IS_OUT, &desc->flags); - } else if (!chip->direction_input) { + if (!chip->direction_input) { /* * If the chip lacks the .direction_input callback * we logically assume all lines are outputs. diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 273badd92561..4a0aeceb42f1 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include #include #include @@ -494,6 +494,12 @@ static void msm_gpio_dbg_show_one(struct seq_file *s, }; g = &pctrl->soc->groups[offset]; + + if (!gpiochip_is_requested(chip, gpio)) { + seq_printf(s, " %-8s:", g->name); + return; + } + ctl_reg = readl(pctrl->regs + g->ctl_reg); is_out = !!(ctl_reg & BIT(g->oe_bit));