Message ID | 20171012094448.31217-3-Zhiqiang.Hou@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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dmarc=fail action=none header.from=nxp.com; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Received: from tx30smr01.am.freescale.net (192.88.168.50) by BN1AFFO11FD033.mail.protection.outlook.com (10.58.52.246) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.20.77.10 via Frontend Transport; Thu, 12 Oct 2017 10:02:41 +0000 Received: from titan.ap.freescale.net ([10.192.208.233]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id v9CA2VVL001998; Thu, 12 Oct 2017 03:02:38 -0700 From: Zhiqiang Hou <Zhiqiang.Hou@nxp.com> To: <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-pci@vger.kernel.org>, <bhelgaas@google.com>, <roy.zang@nxp.com>, <mingkai.hu@nxp.com>, <minghuan.lian@nxp.com> Subject: [PATCHv2 2/2] pci/layerscape: change the default error response behavior Date: Thu, 12 Oct 2017 17:44:48 +0800 Message-ID: <20171012094448.31217-3-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171012094448.31217-1-Zhiqiang.Hou@nxp.com> References: <20171012094448.31217-1-Zhiqiang.Hou@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131522761663667478; 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diff --git a/drivers/pci/dwc/pci-layerscape.c b/drivers/pci/dwc/pci-layerscape.c index 87fa486bee2c..3a4277a5ab2c 100644 --- a/drivers/pci/dwc/pci-layerscape.c +++ b/drivers/pci/dwc/pci-layerscape.c @@ -33,6 +33,8 @@ /* PEX Internal Configuration Registers */ #define PCIE_STRFMR1 0x71c /* Symbol Timer & Filter Mask Register1 */ +#define PCIE_ABSERR 0x8d0 /* Bridge Slave Error Response Register */ +#define PCIE_ABSERR_SETTING 0x9401 /* Forward error of non-posted request */ #define PCIE_IATU_NUM 6 @@ -124,6 +126,14 @@ static int ls_pcie_link_up(struct dw_pcie *pci) return 1; } +/* Forward error response of outbound non-posted requests */ +static void ls_pcie_fix_error_response(struct ls_pcie *pcie) +{ + struct dw_pcie *pci = pcie->pci; + + iowrite32(PCIE_ABSERR_SETTING, pci->dbi_base + PCIE_ABSERR); +} + static int ls_pcie_host_init(struct pcie_port *pp) { struct dw_pcie *pci = to_dw_pcie_from_pp(pp); @@ -135,6 +145,7 @@ static int ls_pcie_host_init(struct pcie_port *pp) * dw_pcie_setup_rc() will reconfigure the outbound windows. */ ls_pcie_disable_outbound_atus(pcie); + ls_pcie_fix_error_response(pcie); dw_pcie_dbi_ro_wr_en(pci); ls_pcie_clear_multifunction(pcie);