From patchwork Wed Nov 1 16:58:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Salyzyn X-Patchwork-Id: 10036769 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6D6DD603B5 for ; Wed, 1 Nov 2017 17:01:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9E52A27FA8 for ; Wed, 1 Nov 2017 17:01:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 91F15286BE; Wed, 1 Nov 2017 17:01:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 276DE27FA8 for ; Wed, 1 Nov 2017 17:01:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=GSoGsfPAQl+waZ3K6EwzKCEdQ5F/cTuqbkKQZzGXBzw=; b=qUB nV+77dHB06e5t68HRe+tMX/lNOWtWcvjfAfwXC7KERdGRYHopvw+vtvyvymsGiw+7C/YcEat2Kbf+ bGlnXaCOyZdEhNHGG46LhFRdgd3lkpOhAroXY917ueUea/bxi7zuq0aHiQE0HuOHD3BuzObE9YWdI FmAYPDYLk6IDM6UEOBHRxdfp60+dtHMz8K+pkvZXjASwehrCZJYIWvGG9nt0Dc9T/D4zJg2qwA7i1 gxqmPLCQmCLsFkOaCSxag4giVhPC6Vb7e5d1koxfa/1scL336A9p9XinVYRtCEjllf9M7kb3qXMWh syskIIM4RSikJF6Vjbz+e0odgqi2pCA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1e9wNv-0001eS-Ju; Wed, 01 Nov 2017 17:00:59 +0000 Received: from mail-io0-x244.google.com ([2607:f8b0:4001:c06::244]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1e9wNs-0001YD-5A for linux-arm-kernel@lists.infradead.org; Wed, 01 Nov 2017 17:00:57 +0000 Received: by mail-io0-x244.google.com with SMTP id h70so7509410ioi.4 for ; Wed, 01 Nov 2017 10:00:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=android.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=0/iO5IXT3PGSlsvQQ3aeGv+f3V+Pht2tE5IB/PVLh3s=; b=DXWwR7b+6oe10Fy73zHVzxmpCXgEI/UhBQZjAoLoiiqgpwcZPUNsDHv53hH3MeOMJ9 dREXkuJj2OvO+3YRRGpDtEnqAMKQv28cypY08qHeNacSSAUNz+Vnbak4ezdhXXPWKPSV Yiss4Q5V8du+jSL1a8ysFvdfXL89K+KLBhYZ+ao7OtcEXdWQ5amkXXtTuULNgKW58pwD sSktEeaQE6AnKriC3HekEOvTZajG408viM0d5HGh+SRbHVt7PV7gEuFtDIIlD6pxKdCe rl6Ext+2+1PXuipYV6ITSTyLAQLFhRN4vzbqg7pgIWQEiC6lFh0YvuQ2QE06ObeD9Vnh 0Jmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=0/iO5IXT3PGSlsvQQ3aeGv+f3V+Pht2tE5IB/PVLh3s=; b=WWz9rPr0lE9UxP2jvejHerq43MtF2NVxfEXchTv8L0CtuTzgHME25rK214OXt2Um4/ U7D0MFDTIRxpAe0bbpI2aU6PesW8bQSgr98X7z2djI2s8fGwGRMEhoddLSSPqJe8ctf8 cjSkLC3PuCX3ND5LHP1/SWtv541MDhYMi62/ZrHRVvDhtIPiq7dhePmFpJV7mxQAFYBn hWeYKqxrqVTNTHpbkUdYBN2gzexSMs02Y9YMJOJgZswjdnQwNDUPzvEqFdyeg/6i5w0Z JRp9/iEJt9C1prei73w5TigQQMab8ov/4TpSOH66U8msSWW9n7eRTqWTcNkUFBZtsx/X CtMg== X-Gm-Message-State: AMCzsaV9qflhCDY6qeHpoJHD8NeUcbFKQt1a4GOE4Qk0xyKHX7oljwZG j33doXD8byuVFpi5vaDSZb4/HA== X-Google-Smtp-Source: ABhQp+SqLIjXfl3RWdltygnXv+n5s1bSS+A1ODPxYbp6MikFBhPLtm/0NWvhPkZM3nPFCSwKdMTpEg== X-Received: by 10.36.214.193 with SMTP id o184mr1410727itg.71.1509555633002; Wed, 01 Nov 2017 10:00:33 -0700 (PDT) Received: from nebulus.mtv.corp.google.com ([100.98.120.17]) by smtp.gmail.com with ESMTPSA id f184sm617308ith.2.2017.11.01.10.00.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 01 Nov 2017 10:00:32 -0700 (PDT) From: Mark Salyzyn To: linux-kernel@vger.kernel.org Subject: [PATCH] arm64: write_sysreg asm illegal for aarch32 Date: Wed, 1 Nov 2017 09:58:33 -0700 Message-Id: <20171101170014.20931-1-salyzyn@android.com> X-Mailer: git-send-email 2.15.0.403.gc27cc4dac6-goog X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171101_100056_248109_206E8859 X-CRM114-Status: UNSURE ( 9.64 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Christoffer Dall , Stefan Traby , Suzuki K Poulose , Marc Zyngier , Catalin Marinas , Will Deacon , Mark Salyzyn , Dave Martin , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Cross compiling to aarch32 (for vdso32) using clang correctly identifies that (the unused) write_sysreg inline asm directive is illegal in that architectural context: arch/arm64/include/asm/arch_timer.h: error: invalid input constraint 'rZ' in asm write_sysreg(cntkctl, cntkctl_el1); ^ arch/arm64/include/asm/sysreg.h: note: expanded from macro 'write_sysreg' : : "rZ" (__val)); ^ GCC normally checks for correctness everywhere. But uniquely for unused asm, will optimize out and suppress the error report. Signed-off-by: Mark Salyzyn Cc: Catalin Marinas Cc: Will Deacon Cc: Christoffer Dall Cc: Mark Rutland Cc: Marc Zyngier Cc: Suzuki K Poulose Cc: Stefan Traby Cc: Dave Martin Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- arch/arm64/include/asm/sysreg.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index f707fed5886f..a7b61c9327db 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -492,11 +492,15 @@ asm( * The "Z" constraint normally means a zero immediate, but when combined with * the "%x0" template means XZR. */ +#if defined(__aarch64__) #define write_sysreg(v, r) do { \ u64 __val = (u64)(v); \ asm volatile("msr " __stringify(r) ", %x0" \ : : "rZ" (__val)); \ } while (0) +#else +#define write_sysreg(v, r) BUG() +#endif /* * For registers without architectural names, or simply unsupported by