From patchwork Mon Nov 6 19:46:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Trent Piepho X-Patchwork-Id: 10044357 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0D8DF60247 for ; Mon, 6 Nov 2017 19:47:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F04CD23794 for ; Mon, 6 Nov 2017 19:47:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E524429FBE; Mon, 6 Nov 2017 19:47:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAD_ENC_HEADER,BAYES_00, DKIM_SIGNED, DKIM_VALID, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4CDD823794 for ; Mon, 6 Nov 2017 19:47:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=HObRuoAZpeye11AxvJtil7rTCFfFJHO1T0zB3TTGMlk=; b=lZbJDsDwHhW1eP PKh7zIMZNrly7Ls8F4XI5t0Oma6V0GcxIG0usduUX0pxYgb/oM/+DHywFAErOjW9Yw5t1ra3JfA8z YHeo6XRYrobvjVFCsi2+zvLGOOZgzm4DhK5V57VP1m2kIHaeJcx5+MocNBLKRKvNcBIm0koT0+bSe EdB0JPS6ab5kTpix0p+SF+E+wGPH8Ob+A8ynutb/gw9AYt+wHZks0ioneKiqo6+6d8/Wg4znskQ5w /WyPn4hoePpYU8BWWj9b09WKfCycVA/H5I4lUPHnDTpHUWCRJ4tuHrzbhd2FuS9jy2PpTidJX2NdQ M4bfCg0q21cWjhxnj+Jg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1eBnMs-0000da-EB; Mon, 06 Nov 2017 19:47:34 +0000 Received: from mail-by2nam03on0106.outbound.protection.outlook.com ([104.47.42.106] helo=NAM03-BY2-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1eBnMP-0007sT-MX for linux-arm-kernel@lists.infradead.org; Mon, 06 Nov 2017 19:47:09 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=impinj.onmicrosoft.com; s=selector1-impinj-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=OyP60RKjlYRuORf2Vl3CQQBwOWTmSG2xrcbXC61wgm4=; b=pNDP/5GPE0gYija2Ohm42E28gqpTCKHhrn9TbttNUJpKR2228y4qvKrt5jaAxpxoX7AdWF9gxP+YD6xWTrCJvrnhvKCiL3MFT3YUQI8TrVSSC2lpg+sFG/pCgXVbBf7d/zrZYT/ppxSY+fw8wHX4Nb3isXpUFNCQjcV+x6DZeGs= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=tpiepho@impinj.com; Received: from impinj.com (216.243.31.162) by MWHPR06MB2814.namprd06.prod.outlook.com (10.175.137.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.197.13; Mon, 6 Nov 2017 19:46:31 +0000 From: Trent Piepho To: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 3/3] ARM: imx: Update spi_imx platform data to reflect current state Date: Mon, 6 Nov 2017 11:46:18 -0800 Message-Id: <20171106194618.9421-4-tpiepho@impinj.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171106194618.9421-1-tpiepho@impinj.com> References: <20171106194618.9421-1-tpiepho@impinj.com> MIME-Version: 1.0 X-Originating-IP: [216.243.31.162] X-ClientProxiedBy: MWHPR06CA0001.namprd06.prod.outlook.com (10.174.172.142) To MWHPR06MB2814.namprd06.prod.outlook.com (10.175.137.147) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 1e11870b-1608-482f-5e60-08d5254f1428 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(4534020)(4602075)(4627115)(201703031133081)(201702281549075)(2017052603199); SRVR:MWHPR06MB2814; X-Microsoft-Exchange-Diagnostics: 1; MWHPR06MB2814; 3:yVVMkDw/luf2GAnZm/afdOUzVLtJbhWHHvSxnX+UaPJrG1e+YzkWJdJMixvlQgYUkbfwEgBqWS7UcrUdIn33ef0X5ivDUEXa7xX3d6ugXck41AgdLiW8VTbFU7oIOlNHuJXrYcynUOccjytEdjwvVLZ1eU7VLrvog3QFe9B8P8wT8RptrkfoAGdXcpad6+fdwEhjyMrzN6j2csdxVpmQkieP6IRQ4qjWwnNTHG/CkigXL8CNy8pBlKb9zzpghc4t; 25:WHQp1w7rJxfnYL01tRy/wLiIiw9m7MO0wQOmAgPwQh7b+qdnoJcFnIw2LoIRCp0fSESR5vJi9OdAHa5twnrYo+ehCL9WA/cphesXDncBFlk0K0jmZVDSrV37+AndrDrqvt6SfzbkdOUIsnxI5RT0pC9K0gaYEaMe3talWipGleeBOsX5s1QKlyriGaKqgC3LW1aXq6iSLglbaPVET4eKnpMJUephxo2wrrlc4Px6GVbIAnRUJYdOZpIn3hROpPNXAwBV3Z1oYo8vaJRwV9VgVovBr8ri4QtZWUfwT9jOEljU3/c0wyxLHgsIXtFF1WGEErXL4Ffzlu7jH1Ehn499iA==; 31:eea7/kYSTRqgQcKUSXryoR4Xl5mGFL5d8t5hrvB1gROlCSO6BCkYjsBCoVtCYRjNXjZKwDrgngad0nPx06UHDOMqtbe0v/mirHkxU9VPWSDWbF10V7Y0KEzCwJXtFkcxTusnQOaTK7oHBdmnQJ4qE6ZF+mcVX18DRJeXw+u27b56CCq0kRuSocV8nYZGeeWW2zOXYjEI/6KnDT3tEwicws6o9uXEAjAdz1y7fbaMHIw= X-MS-TrafficTypeDiagnostic: MWHPR06MB2814: X-Microsoft-Exchange-Diagnostics: 1; MWHPR06MB2814; 20:/oURsCqbAWNb4PIKrH7PmQMlYQsudNIiqPUxZavPI8n/4ObBq2o7LpDCfE6u0591GXiH705doWEhegb+JqWsSRTa55VgKSdFwSUwsMbms1M1eWNTxdv7MwiYz9UpS7rqoHWvawIHy5qH3PwxoDIvkUrzzfJNG3hZXEm7xzxGhPIYBm6pd2/rTIwoqO5Fe6ACtceIoRFoaXCfjK8aczDW9PLK9Bgrs0xxWAmxrn9ZdOFbYt9hs6DcaMiRXySPtPongbF2mWX3jO6QcMexB3bW1B1Mt80FwY7pCoEvuv1sYddPdtlR5CUn8gAu0iQPjfSCdrQM69VxLZllhaFzycgybSyJVgYWN85H1Wz3YV3hkDK8SEy42wC6ibtdkO+m/EuSR/W/GsNPRIwmNVlqgs6UMz177ZVI1ab8xxcn0YYAswAehzbCXpncpbMcC+XNEGH38QJ6bFEoCznVcfSDZdMK5r1Pz3M/knVEcxr2C/boe6IbRqcDkJzLhI/yofImypvy; 4:lpMKhqLMd2Vm+axYNVI5NZcfFRCGzXMcS5T6nsHWZlvFNlekVp77+eG9D/BYEdC9REH3YLa23Z3ytg9KeD5GK/I+Nf2SUOeUdtQU9rn9sHL5ysx/q897AbYwpxb3f2p1+dokrGHIkc7O6qarIs3r2Cgc/SasOtlHuoxkIx5kz54oPxjUFRMnD9GDCp7keOZpgk4nhgnk4WBVRoq+XbS5sGjObuSxfCiMImT65rmxP9OjGOqF9e8Jplyb2DsxtG2ts98VZMH1uy2c97oF7DLRZ1qoJRBS/DfrVge28+nxFpys27ysBe4jYjovwQ1gJv+Q X-Exchange-Antispam-Report-Test: UriScan:(185117386973197); X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(2401047)(8121501046)(5005006)(10201501046)(93006095)(93001095)(3002001)(100000703101)(100105400095)(3231021)(6041248)(20161123558100)(20161123560025)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123555025)(20161123562025)(20161123564025)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095); SRVR:MWHPR06MB2814; BCL:0; PCL:0; RULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095); SRVR:MWHPR06MB2814; X-Forefront-PRVS: 048396AFA0 X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10019020)(6009001)(39830400002)(376002)(346002)(199003)(189002)(2906002)(21086003)(50226002)(33646002)(16526018)(15650500001)(4326008)(101416001)(76176999)(50986999)(36756003)(478600001)(66066001)(25786009)(1076002)(16586007)(5003940100001)(105586002)(305945005)(7736002)(316002)(68736007)(3846002)(6116002)(106356001)(6666003)(55016002)(48376002)(47776003)(54906003)(69596002)(86362001)(81156014)(81166006)(189998001)(2950100002)(8936002)(97736004)(5660300001)(50466002)(8656006)(53936002)(8676002); DIR:OUT; SFP:1102; SCL:1; SRVR:MWHPR06MB2814; H:impinj.com; FPR:; SPF:None; PTR:InfoNoRecords; A:1; MX:1; LANG:en; Received-SPF: None (protection.outlook.com: impinj.com does not designate permitted sender hosts) X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; MWHPR06MB2814; 23:EAq67JbaPajbhaxu6euasg35CBG72o1IT5DIlwCjV?= =?us-ascii?Q?+/k8kZ7sV+IEDQ1s0P3e94Q8nPfUJpEnBcHvwqsr+qd4osqyT095frfSH1OQ?= =?us-ascii?Q?RbJ0QylR6gV2KoeJxUCcwS1JoOmIy3LGNGoArzUqYpjmmGWpUMqLaz8Z6ouR?= =?us-ascii?Q?EOKNLLHbjVzHutw/87A35R7a5MA3iMkQryBVCFulLFW8PcPcFYQgDX1UoHAO?= =?us-ascii?Q?08FSWtUX7316iJb4Ez6uDzFOKmHT0BCOqJjzhWPdgLC9lLa6YyXf7WPYjJLF?= =?us-ascii?Q?FvCR79FdJKYecSleXuU407EP3vxhs2sq59BQXFU3ZM/VpQwXM9lehhO2L9Iy?= =?us-ascii?Q?Exejqqyg4AIbFnagUaAO39g7f/0OenzduATHCtwSJCQaWzeBqYDfO5xj/YRx?= =?us-ascii?Q?hBXSnOkHqWz/ykM/2/u8YaRj2TrxoHjTTxE+jaf3ySNXJAQdwaMOl5pS5zIY?= =?us-ascii?Q?rjhkzMb5Bg7yVRIsbdZqE52ycesj03fiZShJiBjqAyCrA7lBIhjygY4cRvPK?= =?us-ascii?Q?02MN9s2hg/WXX40mwM2TbFzTcsA/wZOfJy+/FryFBW5k+97pL++5o0QQdKkG?= =?us-ascii?Q?3pFEBgCu8xNjR6aWZlF/CezUoGKOMOcetGuXcXpGXmQThkrqaiktiR1x6PC6?= =?us-ascii?Q?JM5XqGv+XSFbPq0Ov0ATflU7cCy+CwRNeK0Wj90QveUdQwJ4iIRmdN5lPZzy?= =?us-ascii?Q?qLCtDZq8YYBDdzVhlPlUK2WSqepUKrot9MpxIoOm0/12qzLSyxgdE2uXWgJQ?= =?us-ascii?Q?0Uqkn+20lQagIBNWgtxZN48aODCbLafUVJoIld+/jYhDq3duJJ8ie4FM6XEk?= =?us-ascii?Q?lvwd4X5RCAuVCiHLY0Ursek7o7UWFgUGdLqH2Ts27x6cceVOR4+nNuRkxGAE?= =?us-ascii?Q?aGwo8Dw0QmNVLO5Poepzkpj6Qk+yLj5oK/5Oq03gnGebHpDjPHFpeKSRldif?= =?us-ascii?Q?fhjxmdWF5rlTRXNGUNBrLeioYVmY98cv6UU2sxmeLXFHyEG8E4p/vgoxn481?= =?us-ascii?Q?rOkOnXGhhF/arY7P5c5gr5vZq0W1oShSsurxJvh5KuhoN2FlscPcI/Xjs2M0?= =?us-ascii?Q?xSZSZ63dLPBe3+muZqC0Wg9sIrkP/4Q80c4UvkKADPAttKqww5NAqrkqZEba?= =?us-ascii?Q?6/jWhN/dVjiTCdMw587ZYuqXTvA3cEM4sresoSkq0DJNgJhUvml1g=3D=3D?= X-Microsoft-Exchange-Diagnostics: 1; MWHPR06MB2814; 6:6W2zgxaE7kKHTm4S0QQWlijN3B0oJp/QfHP4qLM80nH4TqHwbCUHdCisZFOh2lq81GKiRxV6wLZd0ZGnL0cX/3R1vrrAKZnEM/VsvWKWGF4Nx7TUedmRIvz7GzNnx/iJ448+nTZTjRmoZNQJZAz8a5klrqdBov1CQFj1IRJ79GPo1JHtOkFfPuUWFtRl8Zr+na4pxcdsuc3w1TmXI2G2rWikqED2+jWUYU/wycS86IH/N1tFf/Ed76piJOIOzbBREEoghdYL2ffe6SiExzupvP0MV4jDI9Ld+dZV/0aM6VMmylKtnqS5oiLvFAvoxY9n7Q5ruxuKAEoULYixDOtly4eS5qkhKXMnaaohPL/T1IE=; 5:KpIpKHShZozJXXSJHzDV+v9Axz7QFoouomnEYFKOSXzJqytFVW5ikD20+E00mob3JT1HQg3sbJWOH/oxUmkgSPTLj7+GKKpU7IP4gQjTjtw24ix98uoUGx+Rh66/M70ifwSolzpDfldDXwyz63tw+xOHN+XFwKLZju3b29CQv20=; 24:Ebjs3oUY/hr2H0TIOf7u9/LMvVgdA2tJeh/hvOO+RJs3W6a13Mv6eyv336oKEDzQx3L3bsY0R9aQmBSRsyjuwRAyZNM/KJW1/5d3l5RoXkc=; 7:x6IWAZObCsFyWba4Ft6vDLnhPbdpuRcu90zJn/ZsrHVUD0CNwwBf1lEpxMZPwV5pADXl8bJ7FErbL66gZtsgGb2GcSBLCwkfxXVqt5Bsys5Wa3RprsXPVo/Qb7yh8Hq/D4vuC5ECdIBdvDb1fxpSgv79QOyi8TNLavk5pnJb0xeg844Bw4DsXpHps/20CkTM9s54ML+GFrg3Iio1uyFiPuc4BM8ooLuuVFUdt5KSZJB+9tTdRFgbbFJK5pJAXN2j SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: impinj.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Nov 2017 19:46:31.3158 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1e11870b-1608-482f-5e60-08d5254f1428 X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 6de70f0f-7357-4529-a415-d8cbb7e93e5e X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR06MB2814 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171106_114705_895781_0C6EE5A0 X-CRM114-Status: GOOD ( 15.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fabio Estevam , Shawn Guo , Sascha Hauer , Trent Piepho Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The docs for the spi_imx platform data still refer to a -32 offset used to specify a native chip select. This was removed in commit 602c8f4485cd ("spi: imx: fix use of native chip-selects with devicetree") and no longer works as documented. Update documentation. The macro MXC_SPI_CS() is no longer is needed. If a board uses all native chip selects, then it's not necessary to specify a chip select array at all, as all native is the default (this is how device-tree configured SPI masters work too). Most of the spi-imx platform data users have their chip select arrays removed by this patch. This patch also fixes a bug in mx31moboard introduced in the '602 commit. When that board was updated in commit 901f26bce64a ("ARM: imx: set correct chip_select in platform setup") to reflect the SPI change, only SPI bus 2 was updated and SPI bus 1 was left with non-sequential chip selects. The mc13783 spi device on bus 1 had its chip select updated as if it were on bus 2. CC: Shawn Guo CC: Sascha Hauer CC: Fabio Estevam Acked-by: Greg Ungerer Signed-off-by: Trent Piepho Reviewed-by: Oleksij Rempel Acked-by: Shawn Guo --- arch/arm/mach-imx/mach-mx31_3ds.c | 18 ++---------------- arch/arm/mach-imx/mach-mx31lilly.c | 12 ++---------- arch/arm/mach-imx/mach-mx31lite.c | 16 ++-------------- arch/arm/mach-imx/mach-mx31moboard.c | 17 +++-------------- arch/arm/mach-imx/mach-pcm037_eet.c | 5 +---- include/linux/platform_data/spi-imx.h | 29 +++++++++++++++++------------ 6 files changed, 27 insertions(+), 70 deletions(-) diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 68c3f0799d5b..9d87f1dcf7bb 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c @@ -374,26 +374,12 @@ static struct imx_ssi_platform_data mx31_3ds_ssi_pdata = { }; /* SPI */ -static int spi0_internal_chipselect[] = { - MXC_SPI_CS(0), - MXC_SPI_CS(1), - MXC_SPI_CS(2), -}; - static const struct spi_imx_master spi0_pdata __initconst = { - .chipselect = spi0_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi0_internal_chipselect), -}; - -static int spi1_internal_chipselect[] = { - MXC_SPI_CS(0), - MXC_SPI_CS(1), - MXC_SPI_CS(2), + .num_chipselect = 3, }; static const struct spi_imx_master spi1_pdata __initconst = { - .chipselect = spi1_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect), + .num_chipselect = 3, }; static struct spi_board_info mx31_3ds_spi_devs[] __initdata = { diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c index 6fd463642954..8bf52819d4d9 100644 --- a/arch/arm/mach-imx/mach-mx31lilly.c +++ b/arch/arm/mach-imx/mach-mx31lilly.c @@ -226,20 +226,12 @@ static void __init lilly1131_usb_init(void) /* SPI */ -static int spi_internal_chipselect[] = { - MXC_SPI_CS(0), - MXC_SPI_CS(1), - MXC_SPI_CS(2), -}; - static const struct spi_imx_master spi0_pdata __initconst = { - .chipselect = spi_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), + .num_chipselect = 3, }; static const struct spi_imx_master spi1_pdata __initconst = { - .chipselect = spi_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), + .num_chipselect = 3, }; static struct mc13xxx_platform_data mc13783_pdata __initdata = { diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c index f033a57d5694..fcbaf0070ccf 100644 --- a/arch/arm/mach-imx/mach-mx31lite.c +++ b/arch/arm/mach-imx/mach-mx31lite.c @@ -83,15 +83,8 @@ static const struct imxuart_platform_data uart_pdata __initconst = { }; /* SPI */ -static int spi0_internal_chipselect[] = { - MXC_SPI_CS(0), - MXC_SPI_CS(1), - MXC_SPI_CS(2), -}; - static const struct spi_imx_master spi0_pdata __initconst = { - .chipselect = spi0_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi0_internal_chipselect), + .num_chipselect = 3, }; static const struct mxc_nand_platform_data @@ -133,13 +126,8 @@ static struct platform_device smsc911x_device = { * The MC13783 is the only hard-wired SPI device on the module. */ -static int spi1_internal_chipselect[] = { - MXC_SPI_CS(0), -}; - static const struct spi_imx_master spi1_pdata __initconst = { - .chipselect = spi1_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect), + .num_chipselect = 1, }; static struct mc13xxx_platform_data mc13783_pdata __initdata = { diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index 7716f83aecdd..643a3d749703 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c @@ -152,14 +152,8 @@ static const struct imxi2c_platform_data moboard_i2c1_data __initconst = { .bitrate = 100000, }; -static int moboard_spi1_cs[] = { - MXC_SPI_CS(0), - MXC_SPI_CS(2), -}; - static const struct spi_imx_master moboard_spi1_pdata __initconst = { - .chipselect = moboard_spi1_cs, - .num_chipselect = ARRAY_SIZE(moboard_spi1_cs), + .num_chipselect = 3, }; static struct regulator_consumer_supply sdhc_consumers[] = { @@ -296,19 +290,14 @@ static struct spi_board_info moboard_spi_board_info[] __initdata = { /* irq number is run-time assigned */ .max_speed_hz = 300000, .bus_num = 1, - .chip_select = 1, + .chip_select = 0, .platform_data = &moboard_pmic, .mode = SPI_CS_HIGH, }, }; -static int moboard_spi2_cs[] = { - MXC_SPI_CS(0), MXC_SPI_CS(1), -}; - static const struct spi_imx_master moboard_spi2_pdata __initconst = { - .chipselect = moboard_spi2_cs, - .num_chipselect = ARRAY_SIZE(moboard_spi2_cs), + .num_chipselect = 2, }; #define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0) diff --git a/arch/arm/mach-imx/mach-pcm037_eet.c b/arch/arm/mach-imx/mach-pcm037_eet.c index 95bd97710494..15bc956d466b 100644 --- a/arch/arm/mach-imx/mach-pcm037_eet.c +++ b/arch/arm/mach-imx/mach-pcm037_eet.c @@ -56,11 +56,8 @@ static struct spi_board_info pcm037_spi_dev[] = { }; /* Platform Data for MXC CSPI */ -static int pcm037_spi1_cs[] = { MXC_SPI_CS(0), MXC_SPI_CS(1), }; - static const struct spi_imx_master pcm037_spi1_pdata __initconst = { - .chipselect = pcm037_spi1_cs, - .num_chipselect = ARRAY_SIZE(pcm037_spi1_cs), + .num_chipselect = 2, }; /* GPIO-keys input device */ diff --git a/include/linux/platform_data/spi-imx.h b/include/linux/platform_data/spi-imx.h index 08be445e8eb8..9b2ed66ef7a2 100644 --- a/include/linux/platform_data/spi-imx.h +++ b/include/linux/platform_data/spi-imx.h @@ -4,24 +4,29 @@ /* * struct spi_imx_master - device.platform_data for SPI controller devices. - * @chipselect: Array of chipselects for this master. Numbers >= 0 mean gpio - * pins, numbers < 0 mean internal CSPI chipselects according - * to MXC_SPI_CS(). Normally you want to use gpio based chip - * selects as the CSPI module tries to be intelligent about - * when to assert the chipselect: The CSPI module deasserts the - * chipselect once it runs out of input data. The other problem - * is that it is not possible to mix between high active and low - * active chipselects on one single bus using the internal - * chipselects. Unfortunately Freescale decided to put some + * @chipselect: Array of chipselects for this master or NULL. Numbers >= 0 + * mean GPIO pins, -ENOENT means internal CSPI chipselect + * matching the position in the array. E.g., if chipselect[1] = + * -ENOENT then a SPI slave using chip select 1 will use the + * native SS1 line of the CSPI. Omitting the array will use + * all native chip selects. + + * Normally you want to use gpio based chip selects as the CSPI + * module tries to be intelligent about when to assert the + * chipselect: The CSPI module deasserts the chipselect once it + * runs out of input data. The other problem is that it is not + * possible to mix between high active and low active chipselects + * on one single bus using the internal chipselects. + * Unfortunately, on some SoCs, Freescale decided to put some * chipselects on dedicated pins which are not usable as gpios, * so we have to support the internal chipselects. - * @num_chipselect: ARRAY_SIZE(chipselect) + * + * @num_chipselect: If @chipselect is specified, ARRAY_SIZE(chipselect), + * otherwise the number of native chip selects. */ struct spi_imx_master { int *chipselect; int num_chipselect; }; -#define MXC_SPI_CS(no) ((no) - 32) - #endif /* __MACH_SPI_H_*/