From patchwork Fri Dec 8 11:32:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 10102373 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C968760325 for ; Fri, 8 Dec 2017 11:35:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E7D3928B86 for ; Fri, 8 Dec 2017 11:35:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DBB5928BB0; Fri, 8 Dec 2017 11:35:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6B5E828B86 for ; Fri, 8 Dec 2017 11:35:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=YGtf2wCCcB/ZQevEKt1UOHzbj/YtBqVP/4nNJpKCeV8=; b=LsfgrB8/xeUyVzOBe1IoGxYc2o uas1dsMuat+vBWer/EGfGEX38iEYR/XnsynIeR/Du8OawXOn31cvVp5c03goNzh0+rCInzPGueuI4 lxub6dEPXxoiQ8idZncmYMRNRBQnqeXdA2BKFbshCpy5M2NM45C11qtsyvIB1WmS7s9Wynp5BAaEj 7Y4BpKTe72qoYftqVMen+LrWeuCB1I+lTDEUDySEd1ZRMJ7Xt6Lq0z305CKasof+L75q7mfL0mnYT YksAsLw4Qfmq9FrTgNg/kUBh63BPquEes6EAeWGpD1HtFQzCPEpOqV6MnctnNxc+xexk3jDyHsqu0 GsvSvh+g==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1eNGvv-00041n-IG; Fri, 08 Dec 2017 11:35:11 +0000 Received: from mail-wr0-x243.google.com ([2a00:1450:400c:c0c::243]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1eNGuS-0001tF-Cp for linux-arm-kernel@lists.infradead.org; Fri, 08 Dec 2017 11:33:43 +0000 Received: by mail-wr0-x243.google.com with SMTP id o2so10524258wro.5 for ; Fri, 08 Dec 2017 03:33:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uzXGlIzJcPCNtFot8pBV194scRWAkQS1wDTeXEtwM5A=; b=VzqE9Ok5JRjYtI9CedKCFJOlN3cfBooIX94OvWa6zRugUDAcalhT8lEEDI2TpyXS5J mp16COAcekXaKVW/mwkxtC5u0ch51IjJ9Li8hbcwzZYOLaBkAzaabjSy46GZCQfcqb6r RbqDow/cCrloMNNVKxmstg7DxBz18go+xMW8Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uzXGlIzJcPCNtFot8pBV194scRWAkQS1wDTeXEtwM5A=; b=UIB2ydpjj2uFHLxx35rIM4bIMQu2S0V92RvL9H0lWUvjRWBIpgyXOOc9EHQhzjiWKx Nn6a399uhxTDhuXGccci79JRVQ/g4U9VGu6SbDrzGSZ57RZqePFKZa3RcDN2ryo7dd+Z kKFek8xwFtjZsxA5YxivLGSCqh6nDUEwzmiUDMwrjOClYtgNa3E8JGZIvKRURivQ02X7 HSv0ctM3EzvGsWqJZfug5YS12Jo19rNRcIGLwEKzPKmbkAmIG0xVJUd0efknc/An7MdG PSjLYiV+NBIjVaAjzmiXE+deUPLbSM2bhK9uhSpbD/uiWodlEVtmok8cCTdzjeqpu+6O TuTg== X-Gm-Message-State: AJaThX5NwW0lbDDsjFqbZlWNsYt7IkTvy7YwscZO5ieoj+SDSksr2bkk 5e4f5YTX/FTaXLslmst6arabIQ== X-Google-Smtp-Source: AGs4zMbOHVntIthzCxADJI5rYLQ8D03K0bSyY6bmSiAQ3dqP9TK//QYr7gvFT4A5SNvmhDYO4nGABg== X-Received: by 10.223.193.135 with SMTP id x7mr27757051wre.211.1512732797326; Fri, 08 Dec 2017 03:33:17 -0800 (PST) Received: from lmecxl0911.lme.st.com ([80.215.241.46]) by smtp.gmail.com with ESMTPSA id x52sm9184518wrb.25.2017.12.08.03.33.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 08 Dec 2017 03:33:16 -0800 (PST) From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, daniel.lezcano@linaro.org, tglx@linutronix.de, arnd@arndb.de Subject: [PATCH v9 6/6] arm: dts: stm32: remove useless clocksource nodes Date: Fri, 8 Dec 2017 12:32:50 +0100 Message-Id: <20171208113250.359-7-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20171208113250.359-1-benjamin.gaignard@st.com> References: <20171208113250.359-1-benjamin.gaignard@st.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171208_033340_949771_0574DF87 X-CRM114-Status: UNSURE ( 8.46 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Benjamin Gaignard , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Benjamin Gaignard 16 bits timers aren't accurate enough to be used as clocksource, remove them from stm32f4 and stm32f7 devicetree. Signed-off-by: Benjamin Gaignard --- arch/arm/boot/dts/stm32f429.dtsi | 32 -------------------------------- arch/arm/boot/dts/stm32f746.dtsi | 32 -------------------------------- 2 files changed, 64 deletions(-) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index 10099df8b73e..b507e04a52c6 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -107,14 +107,6 @@ }; }; - timer3: timer@40000400 { - compatible = "st,stm32-timer"; - reg = <0x40000400 0x400>; - interrupts = <29>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>; - status = "disabled"; - }; - timers3: timers@40000400 { #address-cells = <1>; #size-cells = <0>; @@ -136,14 +128,6 @@ }; }; - timer4: timer@40000800 { - compatible = "st,stm32-timer"; - reg = <0x40000800 0x400>; - interrupts = <30>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>; - status = "disabled"; - }; - timers4: timers@40000800 { #address-cells = <1>; #size-cells = <0>; @@ -193,14 +177,6 @@ }; }; - timer6: timer@40001000 { - compatible = "st,stm32-timer"; - reg = <0x40001000 0x400>; - interrupts = <54>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>; - status = "disabled"; - }; - timers6: timers@40001000 { #address-cells = <1>; #size-cells = <0>; @@ -217,14 +193,6 @@ }; }; - timer7: timer@40001400 { - compatible = "st,stm32-timer"; - reg = <0x40001400 0x400>; - interrupts = <55>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM7)>; - status = "disabled"; - }; - timers7: timers@40001400 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi index 5f66d151eedb..bb3e262bd456 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -103,14 +103,6 @@ }; }; - timer3: timer@40000400 { - compatible = "st,stm32-timer"; - reg = <0x40000400 0x400>; - interrupts = <29>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>; - status = "disabled"; - }; - timers3: timers@40000400 { #address-cells = <1>; #size-cells = <0>; @@ -132,14 +124,6 @@ }; }; - timer4: timer@40000800 { - compatible = "st,stm32-timer"; - reg = <0x40000800 0x400>; - interrupts = <30>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>; - status = "disabled"; - }; - timers4: timers@40000800 { #address-cells = <1>; #size-cells = <0>; @@ -189,14 +173,6 @@ }; }; - timer6: timer@40001000 { - compatible = "st,stm32-timer"; - reg = <0x40001000 0x400>; - interrupts = <54>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>; - status = "disabled"; - }; - timers6: timers@40001000 { #address-cells = <1>; #size-cells = <0>; @@ -213,14 +189,6 @@ }; }; - timer7: timer@40001400 { - compatible = "st,stm32-timer"; - reg = <0x40001400 0x400>; - interrupts = <55>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>; - status = "disabled"; - }; - timers7: timers@40001400 { #address-cells = <1>; #size-cells = <0>;