From patchwork Tue Jan 16 13:25:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeffy Chen X-Patchwork-Id: 10166937 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1C78D600CA for ; Tue, 16 Jan 2018 13:28:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0D9E028538 for ; Tue, 16 Jan 2018 13:28:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 024C628541; Tue, 16 Jan 2018 13:28:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5326828538 for ; Tue, 16 Jan 2018 13:28:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=l5vwY6F3JQUgzQZkoD0PHHJtY3nvvanTjfpLhk2Nu80=; b=Pf5Q8rAY6WCWTVu8p1P+HtdzlV 7QG4eOiN8h11zXqBNIlZukTcewpr6V1c8D/CbpPEnIAG6F1T5OiRoEP/YSexboRI+76t8JWCCZhEx TWQEe0qmu/SqaXoVtPdDZK4dgfoq6duq69oP+spHDvDRxpv4cbPsx3M3L159dM50+yttCNo51J1iQ e+tcqZHohk2nA92jbwECp2XROU1hicT2ZNynNq+dtFTpL+R+Ps3TyBCO1OjfEBw2SjT7lOvWPIFI0 2rDr77wlKq1mAO1qPoi4Is9GSvmsW1yhJsJX8KARvve7xrsX1PxFkzGmp/D+30bNY9zzaaIh+edtJ p2pH4aqg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.89 #1 (Red Hat Linux)) id 1ebRIC-0006Lq-3w; Tue, 16 Jan 2018 13:28:44 +0000 Received: from regular1.263xmail.com ([211.150.99.137]) by bombadil.infradead.org with esmtps (Exim 4.89 #1 (Red Hat Linux)) id 1ebRGb-00049i-P1; Tue, 16 Jan 2018 13:27:55 +0000 Received: from jeffy.chen?rock-chips.com (unknown [192.168.167.78]) by regular1.263xmail.com (Postfix) with ESMTP id 4D64BDB92; Tue, 16 Jan 2018 21:26:50 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id 73C873A6; Tue, 16 Jan 2018 21:26:40 +0800 (CST) X-RL-SENDER: jeffy.chen@rock-chips.com X-FST-TO: linux-kernel@vger.kernel.org X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: jeffy.chen@rock-chips.com X-UNIQUE-TAG: <096800c4edfbbc1895c145f72e3711cc> X-ATTACHMENT-NUM: 0 X-SENDER: cjf@rock-chips.com X-DNS-TYPE: 0 Received: from localhost (unknown [103.29.142.67]) by smtp.263.net (Postfix) whith ESMTP id 13778C0HJQV; Tue, 16 Jan 2018 21:26:52 +0800 (CST) From: Jeffy Chen To: linux-kernel@vger.kernel.org Subject: [PATCH v2 08/13] iommu/rockchip: Control clocks needed to access the IOMMU Date: Tue, 16 Jan 2018 21:25:35 +0800 Message-Id: <20180116132540.18939-9-jeffy.chen@rock-chips.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180116132540.18939-1-jeffy.chen@rock-chips.com> References: <20180116132540.18939-1-jeffy.chen@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180116_052706_777004_DE807A44 X-CRM114-Status: GOOD ( 16.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, xxm@rock-chips.com, Joerg Roedel , Jeffy Chen , tfiga@chromium.org, jcliang@chromium.org, linux-rockchip@lists.infradead.org, iommu@lists.linux-foundation.org, Rob Herring , robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org, Heiko Stuebner MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tomasz Figa Current code relies on master driver enabling necessary clocks before IOMMU is accessed, however there are cases when the IOMMU should be accessed while the master is not running yet, for example allocating V4L2 videobuf2 buffers, which is done by the VB2 framework using DMA mapping API and doesn't engage the master driver at all. This patch fixes the problem by letting clocks needed for IOMMU operation to be listed in Device Tree and making the driver enable them for the time of accessing the hardware. Signed-off-by: Jeffy Chen Signed-off-by: Tomasz Figa --- Changes in v2: None .../devicetree/bindings/iommu/rockchip,iommu.txt | 8 ++ drivers/iommu/rockchip-iommu.c | 115 +++++++++++++++++++-- 2 files changed, 117 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt index 2098f7732264..33dd853359fa 100644 --- a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt +++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt @@ -14,6 +14,13 @@ Required properties: "single-master" device, and needs no additional information to associate with its master device. See: Documentation/devicetree/bindings/iommu/iommu.txt +Optional properties: +- clocks : A list of master clocks requires for the IOMMU to be accessible + by the host CPU. The number of clocks depends on the master + block and might as well be zero. See [1] for generic clock + bindings description. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt Optional properties: - rockchip,disable-mmu-reset : Don't use the mmu reset operation. @@ -27,5 +34,6 @@ Example: reg = <0xff940300 0x100>; interrupts = ; interrupt-names = "vopl_mmu"; + clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>; #iommu-cells = <0>; }; diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c index 52c6ff8602d8..a7442d59ca43 100644 --- a/drivers/iommu/rockchip-iommu.c +++ b/drivers/iommu/rockchip-iommu.c @@ -4,6 +4,7 @@ * published by the Free Software Foundation. */ +#include #include #include #include @@ -90,6 +91,8 @@ struct rk_iommu { struct device *dev; void __iomem **bases; int num_mmu; + struct clk **clocks; + int num_clocks; int *irq; bool reset_disabled; struct iommu_device iommu; @@ -445,6 +448,83 @@ static int rk_iommu_force_reset(struct rk_iommu *iommu) return 0; } +static void rk_iommu_put_clocks(struct rk_iommu *iommu) +{ + int i; + + for (i = 0; i < iommu->num_clocks; ++i) { + clk_unprepare(iommu->clocks[i]); + clk_put(iommu->clocks[i]); + } +} + +static int rk_iommu_get_clocks(struct rk_iommu *iommu) +{ + struct device_node *np = iommu->dev->of_node; + int ret; + int i; + + ret = of_count_phandle_with_args(np, "clocks", "#clock-cells"); + if (ret == -ENOENT) + return 0; + else if (ret < 0) + return ret; + + iommu->num_clocks = ret; + iommu->clocks = devm_kcalloc(iommu->dev, iommu->num_clocks, + sizeof(*iommu->clocks), GFP_KERNEL); + if (!iommu->clocks) + return -ENOMEM; + + for (i = 0; i < iommu->num_clocks; ++i) { + iommu->clocks[i] = of_clk_get(np, i); + if (IS_ERR(iommu->clocks[i])) { + iommu->num_clocks = i; + goto err_clk_put; + } + ret = clk_prepare(iommu->clocks[i]); + if (ret) { + clk_put(iommu->clocks[i]); + iommu->num_clocks = i; + goto err_clk_put; + } + } + + return 0; + +err_clk_put: + rk_iommu_put_clocks(iommu); + + return ret; +} + +static int rk_iommu_enable_clocks(struct rk_iommu *iommu) +{ + int i, ret; + + for (i = 0; i < iommu->num_clocks; ++i) { + ret = clk_enable(iommu->clocks[i]); + if (ret) + goto err_disable; + } + + return 0; + +err_disable: + for (--i; i >= 0; --i) + clk_disable(iommu->clocks[i]); + + return ret; +} + +static void rk_iommu_disable_clocks(struct rk_iommu *iommu) +{ + int i; + + for (i = 0; i < iommu->num_clocks; ++i) + clk_disable(iommu->clocks[i]); +} + static void log_iova(struct rk_iommu *iommu, int index, dma_addr_t iova) { void __iomem *base = iommu->bases[index]; @@ -501,6 +581,8 @@ static irqreturn_t rk_iommu_irq(int irq, void *dev_id) irqreturn_t ret = IRQ_NONE; int i; + WARN_ON(rk_iommu_enable_clocks(iommu)); + for (i = 0; i < iommu->num_mmu; i++) { int_status = rk_iommu_read(iommu->bases[i], RK_MMU_INT_STATUS); if (int_status == 0) @@ -547,6 +629,8 @@ static irqreturn_t rk_iommu_irq(int irq, void *dev_id) rk_iommu_write(iommu->bases[i], RK_MMU_INT_CLEAR, int_status); } + rk_iommu_disable_clocks(iommu); + return ret; } @@ -589,7 +673,9 @@ static void rk_iommu_zap_iova(struct rk_iommu_domain *rk_domain, list_for_each(pos, &rk_domain->iommus) { struct rk_iommu *iommu; iommu = list_entry(pos, struct rk_iommu, node); + rk_iommu_enable_clocks(iommu); rk_iommu_zap_lines(iommu, iova, size); + rk_iommu_disable_clocks(iommu); } spin_unlock_irqrestore(&rk_domain->iommus_lock, flags); } @@ -818,10 +904,14 @@ static int rk_iommu_attach_device(struct iommu_domain *domain, if (!iommu) return 0; - ret = rk_iommu_enable_stall(iommu); + ret = rk_iommu_enable_clocks(iommu); if (ret) return ret; + ret = rk_iommu_enable_stall(iommu); + if (ret) + goto err_disable_clocks; + ret = rk_iommu_force_reset(iommu); if (ret) goto err_disable_stall; @@ -846,11 +936,14 @@ static int rk_iommu_attach_device(struct iommu_domain *domain, dev_dbg(dev, "Attached to iommu domain\n"); rk_iommu_disable_stall(iommu); + rk_iommu_disable_clocks(iommu); return 0; err_disable_stall: rk_iommu_disable_stall(iommu); +err_disable_clocks: + rk_iommu_disable_clocks(iommu); return ret; } @@ -873,6 +966,7 @@ static void rk_iommu_detach_device(struct iommu_domain *domain, spin_unlock_irqrestore(&rk_domain->iommus_lock, flags); /* Ignore error while disabling, just keep going */ + WARN_ON(rk_iommu_enable_clocks(iommu)); rk_iommu_enable_stall(iommu); rk_iommu_disable_paging(iommu); for (i = 0; i < iommu->num_mmu; i++) { @@ -880,6 +974,7 @@ static void rk_iommu_detach_device(struct iommu_domain *domain, rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, 0); } rk_iommu_disable_stall(iommu); + rk_iommu_disable_clocks(iommu); iommu->domain = NULL; @@ -1171,23 +1266,30 @@ static int rk_iommu_probe(struct platform_device *pdev) return err; } + err = rk_iommu_get_clocks(iommu); + if (err) + return err; + iommu->reset_disabled = device_property_read_bool(dev, "rockchip,disable-mmu-reset"); err = iommu_device_sysfs_add(&iommu->iommu, dev, NULL, dev_name(dev)); if (err) - return err; + goto err_put_clocks; iommu_device_set_ops(&iommu->iommu, &rk_iommu_ops); err = iommu_device_register(&iommu->iommu); - if (err) { - iommu_device_sysfs_remove(&iommu->iommu); - return err; - } + if (err) + goto err_remove_sysfs; bus_set_iommu(&platform_bus_type, &rk_iommu_ops); return 0; +err_remove_sysfs: + iommu_device_sysfs_remove(&iommu->iommu); +err_put_clocks: + rk_iommu_put_clocks(iommu); + return err; } static int rk_iommu_remove(struct platform_device *pdev) @@ -1196,6 +1298,7 @@ static int rk_iommu_remove(struct platform_device *pdev) iommu_device_unregister(&iommu->iommu); iommu_device_sysfs_remove(&iommu->iommu); + rk_iommu_put_clocks(iommu); return 0; }