From patchwork Tue Feb 6 14:26:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 10203161 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id ECD3C60327 for ; Tue, 6 Feb 2018 14:27:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E0343289DC for ; Tue, 6 Feb 2018 14:27:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D497F28A01; Tue, 6 Feb 2018 14:27:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6B04628A37 for ; Tue, 6 Feb 2018 14:27:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=XSpYhqUAzb9oYvizzzaCJbzZfvPCwNDpp7xqVBtBe0E=; b=LICJW08few2EbohrLWMpiFOdoB hNcLUIFbQzzS0sizBjJPoxfTxX2urLtp1v6Q634uH6MdVfW3GricTCqVhNUxpzhE9SPMDcq56DVGN NksLjJLTgg85AZvzegv6lgMOJYliZDZ81E4gLj3DJAtYaJXLTUdgGQfFTN1IEJ3xKdaqJHiMxUJ1z i2ILIPLQmTjwUF1tB+BeEaXl2N6c+AQ44/qkshoAwquT92Ii3tKpR0fTl09y4GbrdNEGrT6hxwa3b 8xih7KrA3ipmC0NxFcjpMdQfz3MX5jqK223NeQQ6BjrHofQfnmXd4LYh1y8E6aH71c6Z97Z8VYdbl Km3ZhyjA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.89 #1 (Red Hat Linux)) id 1ej4Dl-00063q-BU; Tue, 06 Feb 2018 14:27:41 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.89 #1 (Red Hat Linux)) id 1ej4DA-0005Ex-I7 for linux-arm-kernel@lists.infradead.org; Tue, 06 Feb 2018 14:27:10 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: sre) with ESMTPSA id 97B6F273146 From: Sebastian Reichel To: Shawn Guo , Sascha Hauer , Fabio Estevam , Will Deacon , Mark Rutland Subject: [PATCHv2 2/3] ARM: imx53: add SoC specific PMU setup Date: Tue, 6 Feb 2018 15:26:28 +0100 Message-Id: <20180206142629.534-3-sebastian.reichel@collabora.co.uk> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180206142629.534-1-sebastian.reichel@collabora.co.uk> References: <20180206142629.534-1-sebastian.reichel@collabora.co.uk> X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Russell King , linux-kernel@vger.kernel.org, Ian Ray , Rob Herring , Nandor Han , Sebastian Reichel , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Peter Senna Tschudin On i.MX53 it is necessary to set the DBG_EN bit in the platform GPC register to enable access to PMU counters other than the cycle counter. Signed-off-by: Martin Fuzzey Signed-off-by: Peter Senna Tschudin Signed-off-by: Sebastian Reichel --- arch/arm/mach-imx/mach-imx53.c | 68 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c index 07c2e8dca494..da7c80371f32 100644 --- a/arch/arm/mach-imx/mach-imx53.c +++ b/arch/arm/mach-imx/mach-imx53.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -28,10 +29,77 @@ static void __init imx53_init_early(void) mxc_set_cpu_type(MXC_CPU_MX53); } +/* Hard code as this is i.Mx53 only file */ +#define MXC_CORTEXA8_PLAT_GPC 0x63fa0004 +#define GPC_DBG_EN (1 << 16) + +static void __iomem *imx53_pmu_get_gpc(void) +{ + static void __iomem *gpc; + + if (!gpc) { + gpc = ioremap(MXC_CORTEXA8_PLAT_GPC, 4); + if (!gpc) + printk_once(KERN_INFO "unable to map GPC to enable perf\n"); + } + + return gpc; +} + +static int imx53_pmu_reserve(struct arm_pmu *arm_pmu) +{ + void __iomem *gpc_reg; + u32 gpc; + + gpc_reg = imx53_pmu_get_gpc(); + if (!gpc_reg) + return 0; + + gpc = __raw_readl(gpc_reg); + if (gpc & GPC_DBG_EN) { + arm_pmu->reserved_hardware = false; + } else { + gpc |= GPC_DBG_EN; + __raw_writel(gpc, gpc_reg); + arm_pmu->reserved_hardware = true; + } + + return 0; +} + +static void imx53_pmu_release(struct arm_pmu *arm_pmu) +{ + void __iomem *gpc_reg; + u32 gpc; + + gpc_reg = imx53_pmu_get_gpc(); + if (!gpc_reg) + return; + + if (arm_pmu->reserved_hardware) { + gpc = __raw_readl(gpc_reg); + gpc &= ~GPC_DBG_EN; + __raw_writel(gpc, gpc_reg); + arm_pmu->reserved_hardware = false; + } +} + +static struct arm_pmu_platdata imx53_pmu_platdata = { + .reserve_hardware = imx53_pmu_reserve, + .release_hardware = imx53_pmu_release, +}; + +static struct of_dev_auxdata imx53_auxdata_lookup[] __initdata = { + OF_DEV_AUXDATA("arm,cortex-a8-pmu", 0, "arm-pmu", &imx53_pmu_platdata), + {} +}; + static void __init imx53_dt_init(void) { imx_src_init(); + of_platform_populate(NULL, of_default_bus_match_table, + imx53_auxdata_lookup, NULL); imx_aips_allow_unprivileged_access("fsl,imx53-aipstz"); }