arm64: dts: stratix10: enable i2c, add i2c periperals

Commit Message

Alan Tull Feb. 21, 2018, 8:25 p.m. UTC

Add clock for i2c
Enable i2c1
Set the i2c bus speed to 100KHz
Add the following i2c peripherals
* ds1339 RTC
* 24c32 EEPROM
* max1619 temperature monitor
* ltc2497 ADC
  * Add a fixed regulator for the ADC's Vref.

This requires Dinh Nguyen's Stratix10 clock driver
("clk: socfpga: stratix10: add clock driver for Stratix10 platform")

Signed-off-by: Alan Tull <[e-mail]>
---
 arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi  |  5 ++++
 .../boot/dts/altera/socfpga_stratix10_socdk.dts    | 34 ++++++++++++++++++++++
 2 files changed, 39 insertions(+)

Comments

Dinh Nguyen March 5, 2018, 3:25 p.m. UTC | #1

Hi Alan,

On 02/21/2018 02:25 PM, Alan Tull wrote:
> Add clock for i2c
> Enable i2c1
> Set the i2c bus speed to 100KHz
> Add the following i2c peripherals
> * ds1339 RTC
> * 24c32 EEPROM
> * max1619 temperature monitor
> * ltc2497 ADC
>   * Add a fixed regulator for the ADC's Vref.
> 
> This requires Dinh Nguyen's Stratix10 clock driver
> ("clk: socfpga: stratix10: add clock driver for Stratix10 platform")
> 

Thanks for the patch! I've staged this patch based on the clock driver
patch.

Dinh

Patch

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 5a6a699..65d9256 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -210,6 +210,7 @@ 
 			reg = <0xffc02800 0x100>;
 			interrupts = <0 103 4>;
 			resets = <&rst I2C0_RESET>;
+			clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
 			status = "disabled";
 		};
 
@@ -220,6 +221,7 @@ 
 			reg = <0xffc02900 0x100>;
 			interrupts = <0 104 4>;
 			resets = <&rst I2C1_RESET>;
+			clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
 			status = "disabled";
 		};
 
@@ -230,6 +232,7 @@ 
 			reg = <0xffc02a00 0x100>;
 			interrupts = <0 105 4>;
 			resets = <&rst I2C2_RESET>;
+			clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
 			status = "disabled";
 		};
 
@@ -240,6 +243,7 @@ 
 			reg = <0xffc02b00 0x100>;
 			interrupts = <0 106 4>;
 			resets = <&rst I2C3_RESET>;
+			clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
 			status = "disabled";
 		};
 
@@ -250,6 +254,7 @@ 
 			reg = <0xffc02c00 0x100>;
 			interrupts = <0 107 4>;
 			resets = <&rst I2C4_RESET>;
+			clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
 			status = "disabled";
 		};
 
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
index b7f0b6b..cf3b519 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -51,6 +51,13 @@ 
 		reg = <0 0 0 0>;
 	};
 
+	ref_033v: 033-v-ref {
+		compatible = "regulator-fixed";
+		regulator-name = "0.33V";
+		regulator-min-microvolt = <330000>;
+		regulator-max-microvolt = <330000>;
+	};
+
 	soc {
 		clock-controller@ffd10000 {
 			clocks {
@@ -111,3 +118,30 @@ 
 &usb0 {
 	status = "okay";
 };
+
+&i2c1 {
+	status = "okay";
+	clock-frequency = <100000>;
+
+	adc@14 {
+		compatible = "lltc,ltc2497";
+		reg = <0x14>;
+		vref-supply = <&ref_033v>;
+	};
+
+	temp@4c {
+		compatible = "maxim,max1619";
+		reg = <0x4c>;
+	};
+
+	eeprom@51 {
+		compatible = "atmel,24c32";
+		reg = <0x51>;
+		pagesize = <32>;
+	};
+
+	rtc@68 {
+		compatible = "dallas,ds1339";
+		reg = <0x68>;
+	};
+};