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Thu, 22 Feb 2018 14:45:27 +1030 From: Joel Stanley To: Andrew Jeffery Subject: [PATCH] ARM: dts: aspeed-palmetto: Enable rear UART Date: Thu, 22 Feb 2018 14:45:24 +1030 Message-Id: <20180222041524.17867-1-joel@jms.id.au> X-Mailer: git-send-email 2.15.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180221_201545_780435_228A0D2B X-CRM114-Status: GOOD ( 12.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Palmetto BMC has a UART connected to a RS-232 transceiver designed to be used as a serial console for the host processor. It appears as a D-sub connector on the back of the chassis. Signed-off-by: Joel Stanley Reviewed-by: Andrew Jeffery --- arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts index bbddfe1d1cc8..b7d3d1825b93 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts @@ -82,6 +82,21 @@ &pinctrl_ddcclk_default &pinctrl_ddcdat_default>; }; +&uart1 { + /* Rear RS-232 connector */ + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_txd1_default + &pinctrl_rxd1_default + &pinctrl_nrts1_default + &pinctrl_ndtr1_default + &pinctrl_ndsr1_default + &pinctrl_ncts1_default + &pinctrl_ndcd1_default + &pinctrl_nri1_default>; +}; + &uart5 { status = "okay"; };