From patchwork Fri Mar 16 14:02:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 10287359 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 40E046061F for ; Fri, 16 Mar 2018 14:05:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3171528EE2 for ; Fri, 16 Mar 2018 14:05:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2627F28EF1; Fri, 16 Mar 2018 14:05:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2FF2828EE2 for ; Fri, 16 Mar 2018 14:05:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=HSa3/sGB7dCbG+h0uz7n7r88uLaJ1DcbjppmA8lqrcw=; b=rE7kFWSBn9uZumpxd9bO6+NMtK mtBCqFLrfo74+iDRo8hwMwR4mjtIZXw8ddHNgB8ZGOt+pbvMy7sNYe9XGUPT591VhnwZbU1DtB8sK O63FWZM51Wo88xfCnTbRHaU6jH2nnKjmJdETs/u8Wt+ZGAQ3HUBFI7PjoEJTf8TN1urx71Ms/Xb9I stOiBa6HuV7FqMFvHugIWXKieKbcxSUdF9VWSRulCoBQd7PqqMsbRUOQW1PqRWGqmZOS9+ygJ0YA8 pQ3u+TjvQ8O3J9M8kn4iFrVHRbN0dYMZFKTwQv272f85HvwU6d3zwUTMUHXPczAEVP8ZwWscw7qKt 94ttsI2g==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1ewpyz-00021p-HF; Fri, 16 Mar 2018 14:05:21 +0000 Received: from catfish.maple.relay.mailchannels.net ([23.83.214.32]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1ewpxq-00018p-BL for linux-arm-kernel@lists.infradead.org; Fri, 16 Mar 2018 14:04:16 +0000 X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from relay.mailchannels.net (localhost [127.0.0.1]) by relay.mailchannels.net (Postfix) with ESMTP id F102D121453; Fri, 16 Mar 2018 14:03:58 +0000 (UTC) Received: from hermes.aosc.io (unknown [100.96.14.37]) (Authenticated sender: lmn-TZDUIOWCRQMW) by relay.mailchannels.net (Postfix) with ESMTPA id 30C41121006; Fri, 16 Mar 2018 14:03:58 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from hermes.aosc.io (hermes.aosc.io [172.18.54.155]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384) by 0.0.0.0:2500 (trex/5.13.1); Fri, 16 Mar 2018 14:03:58 +0000 X-MC-Relay: Neutral X-MailChannels-SenderId: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io X-MailChannels-Auth-Id: lmn-TZDUIOWCRQMW X-Fumbling-White: 108728907fcf0d05_1521209038785_2968160705 X-MC-Loop-Signature: 1521209038785:984465047 X-MC-Ingress-Time: 1521209038784 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 77D9159788; Fri, 16 Mar 2018 14:03:53 +0000 (UTC) From: Icenowy Zheng To: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Linus Walleij Subject: [PATCH v4 2/9] pinctrl: sunxi: introduce IRQ bank conversion function Date: Fri, 16 Mar 2018 22:02:08 +0800 Message-Id: <20180316140215.28663-3-icenowy@aosc.io> In-Reply-To: <20180316140215.28663-1-icenowy@aosc.io> References: <20180316140215.28663-1-icenowy@aosc.io> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180316_070411_148333_22EB475E X-CRM114-Status: GOOD ( 16.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-sunxi@googlegroups.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Icenowy Zheng MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Allwinner H6 SoC have its pin controllers with the first IRQ-capable GPIO bank at IRQ bank 1 and the second bank at IRQ bank 5. Some refactors in the sunxi pinctrl framework are needed. This commit introduces a IRQ bank conversion function, which replaces the "(bank_base + bank)" code in IRQ register access. Signed-off-by: Icenowy Zheng Acked-by: Maxime Ripard --- Extracted in v4. drivers/pinctrl/sunxi/pinctrl-sunxi.h | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h index a13bd57d880d..466840d886f6 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h @@ -263,14 +263,19 @@ static inline u32 sunxi_pull_offset(u16 pin) return pin_num * PULL_PINS_BITS; } +static inline u32 sunxi_irq_hw_bank_num(const struct sunxi_pinctrl_desc *desc, u8 bank) +{ + return desc->irq_bank_base + bank; +} + static inline u32 sunxi_irq_cfg_reg(const struct sunxi_pinctrl_desc *desc, u16 irq) { - unsigned bank_base = desc->irq_bank_base; u8 bank = irq / IRQ_PER_BANK; u8 reg = (irq % IRQ_PER_BANK) / IRQ_CFG_IRQ_PER_REG * 0x04; - return IRQ_CFG_REG + (bank_base + bank) * IRQ_MEM_SIZE + reg; + return IRQ_CFG_REG + + sunxi_irq_hw_bank_num(desc, bank) * IRQ_MEM_SIZE + reg; } static inline u32 sunxi_irq_cfg_offset(u16 irq) @@ -281,9 +286,7 @@ static inline u32 sunxi_irq_cfg_offset(u16 irq) static inline u32 sunxi_irq_ctrl_reg_from_bank(const struct sunxi_pinctrl_desc *desc, u8 bank) { - unsigned bank_base = desc->irq_bank_base; - - return IRQ_CTRL_REG + (bank_base + bank) * IRQ_MEM_SIZE; + return IRQ_CTRL_REG + sunxi_irq_hw_bank_num(desc, bank) * IRQ_MEM_SIZE; } static inline u32 sunxi_irq_ctrl_reg(const struct sunxi_pinctrl_desc *desc, @@ -302,16 +305,14 @@ static inline u32 sunxi_irq_ctrl_offset(u16 irq) static inline u32 sunxi_irq_debounce_reg_from_bank(const struct sunxi_pinctrl_desc *desc, u8 bank) { - unsigned bank_base = desc->irq_bank_base; - - return IRQ_DEBOUNCE_REG + (bank_base + bank) * IRQ_MEM_SIZE; + return IRQ_DEBOUNCE_REG + + sunxi_irq_hw_bank_num(desc, bank) * IRQ_MEM_SIZE; } static inline u32 sunxi_irq_status_reg_from_bank(const struct sunxi_pinctrl_desc *desc, u8 bank) { - unsigned bank_base = desc->irq_bank_base; - - return IRQ_STATUS_REG + (bank_base + bank) * IRQ_MEM_SIZE; + return IRQ_STATUS_REG + + sunxi_irq_hw_bank_num(desc, bank) * IRQ_MEM_SIZE; } static inline u32 sunxi_irq_status_reg(const struct sunxi_pinctrl_desc *desc,