From patchwork Tue Mar 27 16:19:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 10310627 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4400E60386 for ; Tue, 27 Mar 2018 16:22:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 331D729AFF for ; Tue, 27 Mar 2018 16:22:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 26ECC29B03; Tue, 27 Mar 2018 16:22:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 81CC029AFF for ; Tue, 27 Mar 2018 16:22:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:To:From:References: In-Reply-To:Message-Id:Date:Subject:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=AZ+tJmFMSDh7lapmZV/TPJVFFP/CXDIbTbs+Nhf+Pso=; b=bRBknuiMPqpsG2 tppK1jObSCQRDKI9jkfZLHYbYfkhzqeF7GENuV5fBMcIJVJjb3AkAyPScQLvASzTa6Oj4nNhvOXZU s+rcryHTSdgaJFhzlstR9ADg9Xdz49DiAEsGf9mVNLmN8ew8d2N0mFVPw+uDgl+9SggnueB5ZbHBn fzgsyYavKcBK0ijuEJL37XV7HmmI36snwx7WZ05NPXlueBBawp4vbE7+06k5hKKK4eXN4vkk82Jql jPVNxYYeAXFSmUMvW18k+zR+seHYBhzGHwpNsBrEvWWu4vwjgJgq+iTT4ijKDkzLBRTdegiS+do+i 895b27RCJy+6yYlNzVWg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1f0rMj-0002F2-97; Tue, 27 Mar 2018 16:22:29 +0000 Received: from mail-pl0-x243.google.com ([2607:f8b0:400e:c01::243]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1f0rK1-00073v-3C for linux-arm-kernel@lists.infradead.org; Tue, 27 Mar 2018 16:19:45 +0000 Received: by mail-pl0-x243.google.com with SMTP id n15-v6so14382564plp.12 for ; Tue, 27 Mar 2018 09:19:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=subject:date:message-id:in-reply-to:references:cc:from:to; bh=c+KYNG5BmwW8H1sCmQ8Pi7+XQ3jKtU28QBmicWKzER0=; b=OYQCrJnMacaE6kgkG7OBDFV0PJ2K3Re8y+CrhvQ5rFPIP9okrLSgQSQFrbC4AwF0P5 eIOQEaBayrcUb4nK+uy3re6JjQxli09o/B0su7RwphuVRPxyC3VKdUR14ZxllDnd+QqA kX+DBBtCQWesZnh921T/yrhQPjzcJMElLAQiY4h6+20I1GMCuv1KnRvFiRmkZUdxgdU5 gqNXDY2kELSi5PATDc6d6pA4wEL7h1RbwOZZC09Vuw/hWbqa/uCmEtqsGTJAhZ/MbV1W r4F5KNcZ9HdiT282BSBgm9QizlExyPNekkoTDaPjGUn8ESoFRdcVWsbSbgwCQyvbtrye m/BA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:date:message-id:in-reply-to:references :cc:from:to; bh=c+KYNG5BmwW8H1sCmQ8Pi7+XQ3jKtU28QBmicWKzER0=; b=jk064KxPRvUAPJ+BL5c4uXmNn9tdqNOmvTy4WLD5rmsM3n0UGTuLDHqOtmfenG+vjp zNxWyFySwbFPsLlFp93ERb6BW/OPlyZnGx87y9JMNQFWb/baNJe0F4TW6eO0cEEvtt99 ksMRmF6XntsYRpPOft7KKsdAgCqYNv/gmrFXUjrn9GSocSPJKMOyshvndQGlnwAR1IGs kEEY5Q8m3YwjC4JilM0ZFAONnDDWpX6IWUai0lyQk6dtV0ti61YDr2KKrKOPYrIsd6Gm w0BOTuCW4hDzW3Jhyg2c9V33SF/6NhcAuXiv/i9docGds2jJsWN6RvSfJg3IEZLegqM0 nK+g== X-Gm-Message-State: AElRT7HGsliRBz3rfcKF/eqjKJ5IUlDxd5F1LXwu9o7RBXWSONML7djo NknegcXvKf6I3G1L3AcwHapzTQ== X-Google-Smtp-Source: AG47ELvztFjlf0jH66I2M0bEsnfn+9SCx2JFppSsPjk+7V3UvcGm0jugUeh+ImEk3CnPiIG/ksThlw== X-Received: by 2002:a17:902:51ad:: with SMTP id y42-v6mr42778391plh.314.1522167570318; Tue, 27 Mar 2018 09:19:30 -0700 (PDT) Received: from localhost ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id y18sm3672755pfm.66.2018.03.27.09.19.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Mar 2018 09:19:29 -0700 (PDT) Subject: [PATCH v4 4/8] RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler Date: Tue, 27 Mar 2018 09:19:07 -0700 Message-Id: <20180327161911.14086-5-palmer@sifive.com> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180327161911.14086-1-palmer@sifive.com> References: <20180327161911.14086-1-palmer@sifive.com> From: Palmer Dabbelt To: linux@armlinux.org.uk, catalin.marinas@arm.com, Will Deacon , jonas@southpole.se, stefan.kristiansson@saunalahti.fi, shorne@gmail.com, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, openrisc@lists.librecores.org, linux-riscv@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180327_091941_165750_FCE43072 X-CRM114-Status: GOOD ( 16.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Palmer Dabbelt , Arnd Bergmann MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The old mechanism for handling IRQs on RISC-V was pretty ugly: the arch code looked at the Kconfig entry for our first-level irqchip driver and called into it directly. This patch uses the new generic IRQ handling infastructure, which essentially just deletes a bunch of code. This does add an additional load to the interrupt latency, but there's a lot of tuning left to be done there on RISC-V so I think it's OK for now. Reviewed-by: Christoph Hellwig Acked-by: Stafford Horne Signed-off-by: Palmer Dabbelt --- arch/riscv/Kconfig | 1 + arch/riscv/include/asm/Kbuild | 1 + arch/riscv/kernel/entry.S | 7 +++---- arch/riscv/kernel/irq.c | 13 ------------- 4 files changed, 5 insertions(+), 17 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 04807c7f64cc..148865de1692 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -33,6 +33,7 @@ config RISCV select MODULES_USE_ELF_RELA if MODULES select THREAD_INFO_IN_TASK select RISCV_TIMER + select GENERIC_IRQ_MULTI_HANDLER config MMU def_bool y diff --git a/arch/riscv/include/asm/Kbuild b/arch/riscv/include/asm/Kbuild index 4286a5f83876..1e5fd280fb4d 100644 --- a/arch/riscv/include/asm/Kbuild +++ b/arch/riscv/include/asm/Kbuild @@ -15,6 +15,7 @@ generic-y += fcntl.h generic-y += futex.h generic-y += hardirq.h generic-y += hash.h +generic-y += handle_irq.h generic-y += hw_irq.h generic-y += ioctl.h generic-y += ioctls.h diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 56fa592cfa34..9aaf6c986771 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -167,10 +167,9 @@ ENTRY(handle_exception) bge s4, zero, 1f /* Handle interrupts */ - slli a0, s4, 1 - srli a0, a0, 1 - move a1, sp /* pt_regs */ - tail do_IRQ + move a0, sp /* pt_regs */ + REG_L a1, handle_arch_irq + jr a1 1: /* Exceptions run with interrupts enabled */ csrs sstatus, SR_SIE diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c index 328718e8026e..b74cbfbce2d0 100644 --- a/arch/riscv/kernel/irq.c +++ b/arch/riscv/kernel/irq.c @@ -24,16 +24,3 @@ void __init init_IRQ(void) { irqchip_init(); } - -asmlinkage void __irq_entry do_IRQ(unsigned int cause, struct pt_regs *regs) -{ -#ifdef CONFIG_RISCV_INTC - /* - * FIXME: We don't want a direct call to riscv_intc_irq here. The plan - * is to put an IRQ domain here and let the interrupt controller - * register with that, but I poked around the arm64 code a bit and - * there might be a better way to do it (ie, something fully generic). - */ - riscv_intc_irq(cause, regs); -#endif -}