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Thu, 29 Mar 2018 10:14:10 +0000 Date: Thu, 29 Mar 2018 18:13:56 +0800 From: Jisheng Zhang To: David Miller , Thomas Petazzoni Subject: [PATCH 1/2] net: mvneta: split rxq/txq init into SW and HW parts Message-ID: <20180329181356.6489ee2e@xhacker.debian> In-Reply-To: <20180329181220.61d63c92@xhacker.debian> References: <20180329181220.61d63c92@xhacker.debian> X-Mailer: Claws Mail 3.16.0 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-Originating-IP: [124.74.246.114] X-ClientProxiedBy: TY2PR01CA0015.jpnprd01.prod.outlook.com (2603:1096:404:a::27) To DM5PR03MB2635.namprd03.prod.outlook.com (2603:10b6:3:43::9) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0ad48005-a4aa-4848-dfab-08d5955dd151 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(7020095)(4652020)(5600026)(4604075)(4534165)(4627221)(201703031133081)(201702281549075)(2017052603328)(7153060)(7193020); SRVR:DM5PR03MB2635; X-Microsoft-Exchange-Diagnostics: 1; DM5PR03MB2635; 3:hwrJg4Z1Qqa9TW1nm7xWYWa47t5h+K81ByZ9giOo2chtYWBo3CZsGH638LU1eQh4YtltEJtjWZZoaltpLGuDuFsrfYzEGHB7y9GxOVbNEOlWsHcHB1s7T+GvdDoHA28mg6yFu+N6DKCs5dMWEP55LV0E001ffMnAt0WoCSrLRLE4HOZq9yDo3Nq9+Wo0nFY7n2FyVfn0ZDpemeBUKwTJBUO0p6WeqHmdIYiSp3sjBHdNX82KQA6olLbcWWEUR9cq; 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The SW parts can be optimized out during resume. Signed-off-by: Jisheng Zhang Acked-by: Thomas Petazzoni --- drivers/net/ethernet/marvell/mvneta.c | 70 ++++++++++++++++++++++++++--------- 1 file changed, 53 insertions(+), 17 deletions(-) diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c index 30aab9bf77cc..4ec69bbd1eb4 100644 --- a/drivers/net/ethernet/marvell/mvneta.c +++ b/drivers/net/ethernet/marvell/mvneta.c @@ -2796,10 +2796,8 @@ static void mvneta_rx_reset(struct mvneta_port *pp) /* Rx/Tx queue initialization/cleanup methods */ -/* Create a specified RX queue */ -static int mvneta_rxq_init(struct mvneta_port *pp, - struct mvneta_rx_queue *rxq) - +static int mvneta_rxq_sw_init(struct mvneta_port *pp, + struct mvneta_rx_queue *rxq) { rxq->size = pp->rx_ring_size; @@ -2812,6 +2810,12 @@ static int mvneta_rxq_init(struct mvneta_port *pp, rxq->last_desc = rxq->size - 1; + return 0; +} + +static void mvneta_rxq_hw_init(struct mvneta_port *pp, + struct mvneta_rx_queue *rxq) +{ /* Set Rx descriptors queue starting address */ mvreg_write(pp, MVNETA_RXQ_BASE_ADDR_REG(rxq->id), rxq->descs_phys); mvreg_write(pp, MVNETA_RXQ_SIZE_REG(rxq->id), rxq->size); @@ -2835,6 +2839,20 @@ static int mvneta_rxq_init(struct mvneta_port *pp, mvneta_rxq_short_pool_set(pp, rxq); mvneta_rxq_non_occup_desc_add(pp, rxq, rxq->size); } +} + +/* Create a specified RX queue */ +static int mvneta_rxq_init(struct mvneta_port *pp, + struct mvneta_rx_queue *rxq) + +{ + int ret; + + ret = mvneta_rxq_sw_init(pp, rxq); + if (ret) + return ret; + + mvneta_rxq_hw_init(pp, rxq); return 0; } @@ -2857,9 +2875,8 @@ static void mvneta_rxq_deinit(struct mvneta_port *pp, rxq->descs_phys = 0; } -/* Create and initialize a tx queue */ -static int mvneta_txq_init(struct mvneta_port *pp, - struct mvneta_tx_queue *txq) +static int mvneta_txq_sw_init(struct mvneta_port *pp, + struct mvneta_tx_queue *txq) { int cpu; @@ -2872,7 +2889,6 @@ static int mvneta_txq_init(struct mvneta_port *pp, txq->tx_stop_threshold = txq->size - MVNETA_MAX_SKB_DESCS; txq->tx_wake_threshold = txq->tx_stop_threshold / 2; - /* Allocate memory for TX descriptors */ txq->descs = dma_alloc_coherent(pp->dev->dev.parent, txq->size * MVNETA_DESC_ALIGNED_SIZE, @@ -2882,14 +2898,6 @@ static int mvneta_txq_init(struct mvneta_port *pp, txq->last_desc = txq->size - 1; - /* Set maximum bandwidth for enabled TXQs */ - mvreg_write(pp, MVETH_TXQ_TOKEN_CFG_REG(txq->id), 0x03ffffff); - mvreg_write(pp, MVETH_TXQ_TOKEN_COUNT_REG(txq->id), 0x3fffffff); - - /* Set Tx descriptors queue starting address */ - mvreg_write(pp, MVNETA_TXQ_BASE_ADDR_REG(txq->id), txq->descs_phys); - mvreg_write(pp, MVNETA_TXQ_SIZE_REG(txq->id), txq->size); - txq->tx_skb = kmalloc_array(txq->size, sizeof(*txq->tx_skb), GFP_KERNEL); if (!txq->tx_skb) { @@ -2910,7 +2918,6 @@ static int mvneta_txq_init(struct mvneta_port *pp, txq->descs, txq->descs_phys); return -ENOMEM; } - mvneta_tx_done_pkts_coal_set(pp, txq, txq->done_pkts_coal); /* Setup XPS mapping */ if (txq_number > 1) @@ -2923,6 +2930,35 @@ static int mvneta_txq_init(struct mvneta_port *pp, return 0; } +static void mvneta_txq_hw_init(struct mvneta_port *pp, + struct mvneta_tx_queue *txq) +{ + /* Set maximum bandwidth for enabled TXQs */ + mvreg_write(pp, MVETH_TXQ_TOKEN_CFG_REG(txq->id), 0x03ffffff); + mvreg_write(pp, MVETH_TXQ_TOKEN_COUNT_REG(txq->id), 0x3fffffff); + + /* Set Tx descriptors queue starting address */ + mvreg_write(pp, MVNETA_TXQ_BASE_ADDR_REG(txq->id), txq->descs_phys); + mvreg_write(pp, MVNETA_TXQ_SIZE_REG(txq->id), txq->size); + + mvneta_tx_done_pkts_coal_set(pp, txq, txq->done_pkts_coal); +} + +/* Create and initialize a tx queue */ +static int mvneta_txq_init(struct mvneta_port *pp, + struct mvneta_tx_queue *txq) +{ + int ret; + + ret = mvneta_txq_sw_init(pp, txq); + if (ret < 0) + return ret; + + mvneta_txq_hw_init(pp, txq); + + return 0; +} + /* Free allocated resources when mvneta_txq_init() fails to allocate memory*/ static void mvneta_txq_deinit(struct mvneta_port *pp, struct mvneta_tx_queue *txq)