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auth=pass smtp.auth=ssuloev@orpaltech.com smtp.mailfrom=ssuloev@orpaltech.com X-7FA49CB5: 0D63561A33F958A5D6F3B473DA903CDD26FD46E76099F7CD4C93750CE4906DDB725E5C173C3A84C30584FF81F342DA0754112ADFA3357CA51CE60B8040019C36C4224003CC836476C0CAF46E325F83A50BF2EBBBDD9D6B0F5D41B9178041F3E72623479134186CDE6BA297DBC24807EABDAD6C7F3747799A X-Mailru-Sender: C5364AD02485212F3ACDC11E67D8491745CE778FD125B19292FCD2F3DF80765E069BFC61DABEEB110841D3AAAB1726C63DDE9B364B0DF289264D2CD8C2503E8C22A194DADEED8EEDCA01A23BA9CD1BE7ED14614B50AE0675 X-Mras: OK X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180330_085700_154637_4B9127AC X-CRM114-Status: GOOD ( 14.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sergey Suloev , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP As long as the completion is already provided by the SPI core then there is no need to waste extra-memory on this. Also a waiting function was added to avoid code duplication. Changes in v2: 1) Fixed issue with passing an invalid argument into devm_request_irq() function. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun6i.c | 52 ++++++++++++++++++++++++++++--------------------- 1 file changed, 30 insertions(+), 22 deletions(-) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index 4db1f20..210cef9 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -99,8 +99,6 @@ struct sun6i_spi { struct clk *mclk; struct reset_control *rstc; - struct completion done; - const u8 *tx_buf; u8 *rx_buf; int len; @@ -246,6 +244,30 @@ static int sun6i_spi_prepare_message(struct spi_master *master, return 0; } +static int sun6i_spi_wait_for_transfer(struct spi_device *spi, + struct spi_transfer *tfr) +{ + struct spi_master *master = spi->master; + unsigned int start, end, tx_time; + unsigned int timeout; + + /* smart wait for completion */ + tx_time = max(tfr->len * 8 * 2 / (tfr->speed_hz / 1000), 100U); + start = jiffies; + timeout = wait_for_completion_timeout(&master->xfer_completion, + msecs_to_jiffies(tx_time)); + end = jiffies; + if (!timeout) { + dev_warn(&master->dev, + "%s: timeout transferring %u bytes@%iHz for %i(%i)ms", + dev_name(&spi->dev), tfr->len, tfr->speed_hz, + jiffies_to_msecs(end - start), tx_time); + return -ETIMEDOUT; + } + + return 0; +} + static int sun6i_spi_transfer_one(struct spi_master *master, struct spi_device *spi, struct spi_transfer *tfr) @@ -266,7 +288,6 @@ static int sun6i_spi_transfer_one(struct spi_master *master, if (tfr->len > sspi->fifo_depth) return -EMSGSIZE; - reinit_completion(&sspi->done); sspi->tx_buf = tfr->tx_buf; sspi->rx_buf = tfr->rx_buf; sspi->len = tfr->len; @@ -346,21 +367,9 @@ static int sun6i_spi_transfer_one(struct spi_master *master, reg = sun6i_spi_read(sspi, SUN6I_TFR_CTL_REG); sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg | SUN6I_TFR_CTL_XCH); - tx_time = max(tfr->len * 8 * 2 / (tfr->speed_hz / 1000), 100U); - start = jiffies; - timeout = wait_for_completion_timeout(&sspi->done, - msecs_to_jiffies(tx_time)); - end = jiffies; - if (!timeout) { - dev_warn(&master->dev, - "%s: timeout transferring %u bytes@%iHz for %i(%i)ms", - dev_name(&spi->dev), tfr->len, tfr->speed_hz, - jiffies_to_msecs(end - start), tx_time); - ret = -ETIMEDOUT; - goto out; - } + /* Wait for completion */ + ret = sun6i_spi_wait_for_transfer(spi, tfr); -out: sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, 0); return ret; @@ -368,7 +377,8 @@ out: static irqreturn_t sun6i_spi_handler(int irq, void *dev_id) { - struct sun6i_spi *sspi = dev_id; + struct spi_master *master = dev_id; + struct sun6i_spi *sspi = spi_master_get_devdata(master); u32 status; status = sun6i_spi_read(sspi, SUN6I_INT_STA_REG); @@ -377,7 +387,7 @@ static irqreturn_t sun6i_spi_handler(int irq, void *dev_id) if (status & SUN6I_INT_CTL_TC) { sun6i_spi_write(sspi, SUN6I_INT_STA_REG, SUN6I_INT_CTL_TC); sun6i_spi_drain_fifo(sspi, sspi->fifo_depth); - complete(&sspi->done); + spi_finalize_current_transfer(master); return IRQ_HANDLED; } @@ -476,7 +486,7 @@ static int sun6i_spi_probe(struct platform_device *pdev) } ret = devm_request_irq(&pdev->dev, irq, sun6i_spi_handler, - 0, dev_name(&pdev->dev), sspi); + 0, dev_name(&pdev->dev), master); if (ret) { dev_err(&pdev->dev, "Cannot request IRQ\n"); goto err_free_master; @@ -498,8 +508,6 @@ static int sun6i_spi_probe(struct platform_device *pdev) goto err_free_master; } - init_completion(&sspi->done); - sspi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); if (IS_ERR(sspi->rstc)) { dev_err(&pdev->dev, "Couldn't get reset controller\n");