From patchwork Sat Apr 21 13:55:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 10354159 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 05B5F601E7 for ; Sat, 21 Apr 2018 14:05:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E844B288E0 for ; Sat, 21 Apr 2018 14:05:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DBE002891A; Sat, 21 Apr 2018 14:05:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4F732288E0 for ; Sat, 21 Apr 2018 14:05:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=3mlH4KOhg27MjIpsor3NeHoEwcROxBXivB+I3reKUjE=; b=iapd0rRdHzlCR1GLQ5y+yiIVze 8l5ttcthyoDMyN3THZiAfOsh3VKEIan4aJpP7DCrCKjrEqGub5AGqv8J5OyIyAER+LECiH0dr2ejP wjhdiwtpiZpSundi9fNHp3p0+gHS5M5j3BPNsfU8g9A5fut4MXUBC+3W+y/tDt0uwUD6fikxruUXb t3GfKVcxwytuehETikc5Zch+7UhCZQq+X6zb+Hjo//LSfNr6YSfHdEZzGtvS7EpuA7tw1kfk7bhN1 azL4i3C3tqnJQNYtqo3UnGvJ3AfPnrECyC2CG2oZa77io1dEKXxvHHYJ8nE119NYDRciVWABKT4/L BW1OseBg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1f9t8P-0008JG-Cy; Sat, 21 Apr 2018 14:05:01 +0000 Received: from mail.bootlin.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1f9szn-0003U1-P4 for linux-arm-kernel@lists.infradead.org; Sat, 21 Apr 2018 13:56:13 +0000 Received: by mail.bootlin.com (Postfix, from userid 110) id DD0AA208A8; Sat, 21 Apr 2018 15:55:53 +0200 (CEST) Received: from localhost.localdomain (unknown [91.224.148.103]) by mail.bootlin.com (Postfix) with ESMTPSA id D20AF2081A; Sat, 21 Apr 2018 15:55:52 +0200 (CEST) From: Miquel Raynal To: Thomas Gleixner , Jason Cooper , Marc Zyngier Subject: [PATCH 14/17] dt-bindings/interrupt-controller: add description for Marvell SEI node Date: Sat, 21 Apr 2018 15:55:34 +0200 Message-Id: <20180421135537.24716-15-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180421135537.24716-1-miquel.raynal@bootlin.com> References: <20180421135537.24716-1-miquel.raynal@bootlin.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180421_065608_163345_046A77E0 X-CRM114-Status: GOOD ( 16.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Andrew Lunn , devicetree@vger.kernel.org, Antoine Tenart , Catalin Marinas , Gregory Clement , Haim Boot , Will Deacon , Maxime Chevallier , Nadav Haklai , Rob Herring , Thomas Petazzoni , Miquel Raynal , Hanna Hawa , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Describe the SEI (System Error Interrupt) controller driver. The controller is part of the GIC. It aggregates two types of interrupts, wired and MSIs from respectively the AP and the CPs, into a single SPI interrupt. Suggested-by: Haim Boot Signed-off-by: Miquel Raynal --- .../bindings/interrupt-controller/marvell,sei.txt | 54 ++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt new file mode 100644 index 000000000000..a246d59552b1 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt @@ -0,0 +1,54 @@ +Marvell SEI (System Error Interrupt) Controller +----------------------------------------------- + +Marvell SEI (System Error Interrupt) controller is an interrupt aggregator. +It receives interrupts from several sources and aggregates them to a single +interrupt line (an SPI) on the primary interrupt controller. + +The IRQ chip can handle up to 64 SEIs, a set comes from the AP and is +wired while a second set comes from the CPs by the mean of MSIs. Each +'domain' is represented as a subnode. + +Required properties: + +- compatible: should be "marvell,armada-8k-sei". +- reg: SEI registers location and length. +- interrupts: identifies the parent IRQ that will be triggered. +- #address-cells: should be '1', represents the position of the first + IRQ of a given type in the SEI range. +- #size-cells: should be '1', represents the number of a given type of + IRQs. + +Child node 'sei-wired-controller' required properties: + +- reg: the range of wired interrupts. +- #interrupt-cells: number of cells to define an SEI wired interrupt + coming from the AP, should be 1. The cell is the IRQ + number. +- interrupt-controller: identifies the node as an interrupt controller. + +Child node 'sei-msi-controller' required properties: + +- reg: the range of non-wired interrupts triggered by way of MSIs. +- msi-controller: identifies the node as an MSI controller. + +Example: + + sei: sei@3f0200 { + compatible = "marvell,armada-8k-sei"; + reg = <0x3f0200 0x40>; + interrupts = ; + #address-cells = <1>; + #size-cells = <1>; + + sei_wired_controller: sei-wired-controller@0 { + reg = <0 21>; + #interrupt-cells = <1>; + interrupt-controller; + }; + + sei_msi_controller: sei-msi-controller@21 { + reg = <21 43>; + msi-controller; + }; + };