diff mbox

[v9,07/27] ARM: davinci: dm355: add new clock init using common clock framework

Message ID 20180427001745.4116-8-david@lechnology.com (mailing list archive)
State New, archived
Headers show

Commit Message

David Lechner April 27, 2018, 12:17 a.m. UTC
This adds the new board-specific clock init in mach-davinci/dm355.c
using the new common clock framework drivers.

The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.

Also clean up the #includes since we are adding some here.

Signed-off-by: David Lechner <david@lechnology.com>
---

v9 changes:
- register PLL1 and PSC in dm355_init_time() instead of as platform device so
  that we get the correct timer0 clock for davinci_timer_init()
- Fixed size of PLL memory block

v8 changes:
- none

v7 changes:
- add clock platform device declarations
- register platform devices instead of registering clocks directly
- add davinci prefix to commit description

v6 changes:
- add blank lines between function calls


 arch/arm/mach-davinci/board-dm355-evm.c     |  2 +
 arch/arm/mach-davinci/board-dm355-leopard.c |  2 +
 arch/arm/mach-davinci/davinci.h             |  1 +
 arch/arm/mach-davinci/dm355.c               | 69 +++++++++++++++++----
 4 files changed, 62 insertions(+), 12 deletions(-)

Comments

Sekhar Nori May 3, 2018, 3:34 p.m. UTC | #1
On Friday 27 April 2018 05:47 AM, David Lechner wrote:
> This adds the new board-specific clock init in mach-davinci/dm355.c
> using the new common clock framework drivers.
> 
> The #ifdefs are needed to prevent compile errors until the entire
> ARCH_DAVINCI is converted.
> 
> Also clean up the #includes since we are adding some here.
> 
> Signed-off-by: David Lechner <david@lechnology.com>

I am having trouble booting DM355 EVM with the series applied.
Still to debug what is going wrong.

Thanks,
Sekhar

Uncompressing Linux... done, booting the kernel.
Booting Linux on physical CPU 0x0
Linux version 4.17.0-rc2-08642-g4dee494ef1ee (a0875516@psplinux063) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #202 PREEM8
CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=0005317f
CPU: VIVT data cache, VIVT instruction cache
Machine: DaVinci DM355 EVM
Memory policy: Data cache writethrough
cma: Reserved 16 MiB at 0x86c00000
DaVinci dm355 variant 0x0
random: get_random_bytes called from start_kernel+0x88/0x3f4 with crng_init=0
Built 1 zonelists, mobility grouping on.  Total pages: 32512
Kernel command line: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=172.24.210.141:/datalocal/Sekhar/new/debian/armel ip=dhcp
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Memory: 107044K/131072K available (4684K kernel code, 283K rwdata, 1068K rodata, 240K init, 134K bss, 7644K reserved, 16384K cma-res)
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
    vmalloc : 0xc8800000 - 0xff800000   ( 880 MB)
    lowmem  : 0xc0000000 - 0xc8000000   ( 128 MB)
    modules : 0xbf000000 - 0xc0000000   (  16 MB)
      .text : 0x(ptrval) - 0x(ptrval)   (4686 kB)
      .init : 0x(ptrval) - 0x(ptrval)   ( 240 kB)
      .data : 0x(ptrval) - 0x(ptrval)   ( 284 kB)
       .bss : 0x(ptrval) - 0x(ptrval)   ( 135 kB)
SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
Preemptible hierarchical RCU implementation.
        Tasks RCU enabled.
NR_IRQS: 245
clocksource: timer0_1: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
Console: colour dummy device 80x30
Calibrating delay loop... 106.90 BogoMIPS (lpj=534528)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
CPU: Testing write buffer coherency: ok
Setting up static identity map for 0x80008400 - 0x80008458
Hierarchical SRCU implementation.
devtmpfs: initialized
Built 1 zonelists, mobility grouping on.  Total pages: 30857
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
futex hash table entries: 256 (order: -1, 3072 bytes)
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
mux: initialized INT_EDMA_CC
mux: Setting register INT_EDMA_CC
mux:    INTMUX (0x00000018) = 0x00000000 -> 0x00000004
cpuidle: using governor menu
edma edma.0: Legacy memcpy is enabled, things might not work
edma edma.0: TI EDMA DMA engine driver
dm355evm_msp 1-0025: firmware v.A5, TVP5146 as video-in
clocksource: Switched to clocksource timer0_1
NET: Registered protocol family 2
tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes)
TCP established hash table entries: 1024 (order: 0, 4096 bytes)
TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
workingset: timestamp_bits=30 max_order=15 bucket_order=0
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251)
io scheduler noop registered (default)
io scheduler mq-deadline registered
io scheduler kyber registered
Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
console [ttyS0] disabled
serial8250.0: ttyS0 at MMIO 0x1c20000 (irq = 40, base_baud = 1500000) is a 16550A
console [ttyS0] enabled
serial8250.1: ttyS1 at MMIO 0x1c20400 (irq = 41, base_baud = 1500000) is a 16550A
serial8250 serial8250.2: unable to register port at index 0 (IO0 MEM1e06000 IRQ14): -22
brd: module loaded
libphy: Fixed MDIO Bus: probed
dm9000 dm9000: incomplete constraints, dummy supplies not allowed
eth0: dm9000a at (ptrval),(ptrval) IRQ 65 MAC: 00:0e:99:02:cb:91 (eeprom)
i2c /dev entries driver
davinci-wdt davinci-wdt: heartbeat 60 sec
Division by zero in kernel.
CPU: 0 PID: 1 Comm: swapper Not tainted 4.17.0-rc2-08642-g4dee494ef1ee #202
Hardware name: DaVinci DM355 EVM
Backtrace: 
[<c000dfa4>] (dump_backtrace) from [<c000e274>] (show_stack+0x18/0x1c)
 r7:00000000 r6:00000000 r5:fee11000 r4:c6acd400
[<c000e25c>] (show_stack) from [<c047eedc>] (dump_stack+0x20/0x28)
[<c047eebc>] (dump_stack) from [<c000e104>] (__div0+0x18/0x20)
[<c000e0ec>] (__div0) from [<c047d510>] (Ldiv0+0x8/0x10)
[<c0343e48>] (calculate_clk_divider) from [<c0344014>] (mmc_davinci_set_ios+0x58/0x168)
 r9:c6ac6b80 r8:c05ed140 r7:0000001a r6:00000001 r5:c6acd5e8 r4:c6acd400
[<c0343fbc>] (mmc_davinci_set_ios) from [<c0330480>] (mmc_set_initial_state+0x9c/0xa0)
 r5:c6acd5e8 r4:c6acd400
[<c03303e4>] (mmc_set_initial_state) from [<c03304bc>] (mmc_power_up.part.8+0x38/0x110)
 r5:00000015 r4:c6acd400
[<c0330484>] (mmc_power_up.part.8) from [<c033198c>] (mmc_start_host+0x94/0xa8)
 r7:0000001a r6:c05ed130 r5:00000000 r4:c6acd400
[<c03318f8>] (mmc_start_host) from [<c0332c5c>] (mmc_add_host+0x60/0x88)
 r5:00000000 r4:c6acd400
[<c0332bfc>] (mmc_add_host) from [<c0344630>] (davinci_mmcsd_probe+0x3f8/0x5dc)
 r5:c6acd754 r4:c6acd400
[<c0344238>] (davinci_mmcsd_probe) from [<c02d1f70>] (platform_drv_probe+0x58/0xb4)
 r10:c05a61d4 r9:00000000 r8:00000000 r7:fffffdfb r6:c061f3e4 r5:ffffffed
 r4:c05ed140
[<c02d1f18>] (platform_drv_probe) from [<c02d0380>] (driver_probe_device+0x258/0x33c)
 r7:c061f3e4 r6:00000000 r5:c06458d0 r4:c05ed140
[<c02d0128>] (driver_probe_device) from [<c02d0510>] (__driver_attach+0xac/0xb0)
 r9:00000000 r8:ffffe000 r7:c05e7008 r6:c05ed174 r5:c061f3e4 r4:c05ed140
[<c02d0464>] (__driver_attach) from [<c02ce384>] (bus_for_each_dev+0x78/0xbc)
 r7:c05e7008 r6:c02d0464 r5:c061f3e4 r4:00000000
[<c02ce30c>] (bus_for_each_dev) from [<c02cfcc4>] (driver_attach+0x20/0x28)
 r7:00000000 r6:c061b670 r5:c6ad7960 r4:c061f3e4
[<c02cfca4>] (driver_attach) from [<c02cf704>] (bus_add_driver+0x178/0x20c)
[<c02cf58c>] (bus_add_driver) from [<c02d0f00>] (driver_register+0x80/0xfc)
 r7:00000000 r6:c05c4a30 r5:c05e7008 r4:c061f3e4
[<c02d0e80>] (driver_register) from [<c02d1ebc>] (__platform_driver_register+0x34/0x48)
 r5:c05e7008 r4:c062ae60
[<c02d1e88>] (__platform_driver_register) from [<c05c4a48>] (davinci_mmcsd_driver_init+0x18/0x20)
[<c05c4a30>] (davinci_mmcsd_driver_init) from [<c000a56c>] (do_one_initcall+0x50/0x1a4)
[<c000a51c>] (do_one_initcall) from [<c05a8eb4>] (kernel_init_freeable+0x120/0x1e4)
 r8:c05a8614 r7:c05d4830 r6:00000007 r5:c062ae60 r4:c05e2ae8
[<c05a8d94>] (kernel_init_freeable) from [<c04940f4>] (kernel_init+0x10/0xfc)
 r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c04940e4
 r4:00000000
[<c04940e4>] (kernel_init) from [<c00090e0>] (ret_from_fork+0x14/0x34)
Exception stack(0xc6839fb0 to 0xc6839ff8)
9fa0:                                     00000000 00000000 00000000 00000000
9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
 r5:c04940e4 r4:00000000
Division by zero in kernel.
CPU: 0 PID: 1 Comm: swapper Not tainted 4.17.0-rc2-08642-g4dee494ef1ee #202
Hardware name: DaVinci DM355 EVM
Backtrace: 
[<c000dfa4>] (dump_backtrace) from [<c000e274>] (show_stack+0x18/0x1c)
 r7:00000000 r6:00000000 r5:fee11000 r4:c6acd400
[<c000e25c>] (show_stack) from [<c047eedc>] (dump_stack+0x20/0x28)
[<c047eebc>] (dump_stack) from [<c000e104>] (__div0+0x18/0x20)
[<c000e0ec>] (__div0) from [<c047d510>] (Ldiv0+0x8/0x10)
[<c0343e48>] (calculate_clk_divider) from [<c0344014>] (mmc_davinci_set_ios+0x58/0x168)
 r9:c6ac6b80 r8:c05ed140 r7:00000000 r6:00000001 r5:c6acd5e8 r4:c6acd400
[<c0343fbc>] (mmc_davinci_set_ios) from [<c033057c>] (mmc_power_up.part.8+0xf8/0x110)
 r5:c6acd5e8 r4:c6acd400
[<c0330484>] (mmc_power_up.part.8) from [<c033198c>] (mmc_start_host+0x94/0xa8)
 r7:0000001a r6:c05ed130 r5:00000000 r4:c6acd400
[<c03318f8>] (mmc_start_host) from [<c0332c5c>] (mmc_add_host+0x60/0x88)
 r5:00000000 r4:c6acd400
[<c0332bfc>] (mmc_add_host) from [<c0344630>] (davinci_mmcsd_probe+0x3f8/0x5dc)
 r5:c6acd754 r4:c6acd400
[<c0344238>] (davinci_mmcsd_probe) from [<c02d1f70>] (platform_drv_probe+0x58/0xb4)
 r10:c05a61d4 r9:00000000 r8:00000000 r7:fffffdfb r6:c061f3e4 r5:ffffffed
 r4:c05ed140
[<c02d1f18>] (platform_drv_probe) from [<c02d0380>] (driver_probe_device+0x258/0x33c)
 r7:c061f3e4 r6:00000000 r5:c06458d0 r4:c05ed140
[<c02d0128>] (driver_probe_device) from [<c02d0510>] (__driver_attach+0xac/0xb0)
 r9:00000000 r8:ffffe000 r7:c05e7008 r6:c05ed174 r5:c061f3e4 r4:c05ed140
[<c02d0464>] (__driver_attach) from [<c02ce384>] (bus_for_each_dev+0x78/0xbc)
 r7:c05e7008 r6:c02d0464 r5:c061f3e4 r4:00000000
[<c02ce30c>] (bus_for_each_dev) from [<c02cfcc4>] (driver_attach+0x20/0x28)
 r7:00000000 r6:c061b670 r5:c6ad7960 r4:c061f3e4
[<c02cfca4>] (driver_attach) from [<c02cf704>] (bus_add_driver+0x178/0x20c)
[<c02cf58c>] (bus_add_driver) from [<c02d0f00>] (driver_register+0x80/0xfc)
 r7:00000000 r6:c05c4a30 r5:c05e7008 r4:c061f3e4
[<c02d0e80>] (driver_register) from [<c02d1ebc>] (__platform_driver_register+0x34/0x48)
 r5:c05e7008 r4:c062ae60
[<c02d1e88>] (__platform_driver_register) from [<c05c4a48>] (davinci_mmcsd_driver_init+0x18/0x20)
[<c05c4a30>] (davinci_mmcsd_driver_init) from [<c000a56c>] (do_one_initcall+0x50/0x1a4)
[<c000a51c>] (do_one_initcall) from [<c05a8eb4>] (kernel_init_freeable+0x120/0x1e4)
 r8:c05a8614 r7:c05d4830 r6:00000007 r5:c062ae60 r4:c05e2ae8
[<c05a8d94>] (kernel_init_freeable) from [<c04940f4>] (kernel_init+0x10/0xfc)
 r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c04940e4
 r4:00000000
[<c04940e4>] (kernel_init) from [<c00090e0>] (ret_from_fork+0x14/0x34)
Exception stack(0xc6839fb0 to 0xc6839ff8)
9fa0:                                     00000000 00000000 00000000 00000000
9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
 r5:c04940e4 r4:00000000
Division by zero in kernel.
CPU: 0 PID: 14 Comm: kworker/0:1 Not tainted 4.17.0-rc2-08642-g4dee494ef1ee #202
davinci_mmc dm6441-mmc.0: Using DMA, 4-bit mode
Division by zero in kernel.
Hardware name: DaVinci DM355 EVM
Workqueue: events_freezable mmc_rescan
Backtrace: 
[<c000dfa4>] (dump_backtrace) from [<c000e274>] (show_stack+0x18/0x1c)
CPU: 0 PID: 1 Comm: swapper Not tainted 4.17.0-rc2-08642-g4dee494ef1ee #202
Hardware name: DaVinci DM355 EVM
Backtrace: 
[<c000dfa4>] (dump_backtrace) from [<c000e274>] (show_stack+0x18/0x1c)
 r7:00000000 r6:00000000 r5:fee11000 r4:c6acd400
[<c000e25c>] (show_stack) from [<c047eedc>] (dump_stack+0x20/0x28)
 r7:00000000 r6:00000000 r5:fee00000 r4:c6acd800
[<c000e25c>] (show_stack) from [<c047eedc>] (dump_stack+0x20/0x28)
[<c047eebc>] (dump_stack) from [<c000e104>] (__div0+0x18/0x20)
[<c047eebc>] (dump_stack) from [<c000e104>] (__div0+0x18/0x20)
[<c000e0ec>] (__div0) from [<c047d510>] (Ldiv0+0x8/0x10)
[<c000e0ec>] (__div0) from [<c047d510>] (Ldiv0+0x8/0x10)
[<c0343e48>] (calculate_clk_divider) from [<c0344014>] (mmc_davinci_set_ios+0x58/0x168)
[<c0343e48>] (calculate_clk_divider) from [<c0344014>] (mmc_davinci_set_ios+0x58/0x168)
 r9:00000000 r8:c05ff7b0 r7:60000013 r6:c6acd400 r5:c6acd5e8 r4:c6acd400
 r9:c6ac6d00 r8:c05ed2e0 r7:0000001b r6:00000001 r5:c6acd9e8 r4:c6acd800
[<c0343fbc>] (mmc_davinci_set_ios) from [<c0330480>] (mmc_set_initial_state+0x9c/0xa0)
[<c0343fbc>] (mmc_davinci_set_ios) from [<c0330480>] (mmc_set_initial_state+0x9c/0xa0)
 r5:c6acd5e8 r4:c6acd400
[<c03303e4>] (mmc_set_initial_state) from [<c03307ac>] (mmc_power_off.part.9+0x30/0x44)
 r5:c6acd9e8 r4:c6acd800
[<c03303e4>] (mmc_set_initial_state) from [<c03304bc>] (mmc_power_up.part.8+0x38/0x110)
 r5:00000000 r4:c6acd400
[<c033077c>] (mmc_power_off.part.9) from [<c03317b0>] (mmc_rescan+0x3b8/0x500)
 r5:00000015 r4:c6acd800
[<c0330484>] (mmc_power_up.part.8) from [<c033198c>] (mmc_start_host+0x94/0xa8)
 r5:00000000 r4:c6acd640
[<c03313f8>] (mmc_rescan) from [<c0031de0>] (process_one_work+0x1d8/0x41c)
 r7:0000001b r6:c05ed2d0 r5:00000000 r4:c6acd800
[<c03318f8>] (mmc_start_host) from [<c0332c5c>] (mmc_add_host+0x60/0x88)
 r9:00000000 r8:c05ff7b0 r7:00000000 r6:c7ee9500 r5:c68156c0 r4:c6acd640
[<c0031c08>] (process_one_work) from [<c0032060>] (worker_thread+0x3c/0x670)
 r10:00000008 r9:c05ff7c4 r8:c060f080 r7:c68156d8 r6:ffffe000 r5:c05ff7b0
 r5:00000000 r4:c6acd800
[<c0332bfc>] (mmc_add_host) from [<c0344630>] (davinci_mmcsd_probe+0x3f8/0x5dc)
 r5:c6acdb54 r4:c6acd800
[<c0344238>] (davinci_mmcsd_probe) from [<c02d1f70>] (platform_drv_probe+0x58/0xb4)
 r4:c68156c0
[<c0032024>] (worker_thread) from [<c0038280>] (kthread+0x134/0x14c)
 r10:c05a61d4 r9:00000000 r8:00000000 r7:fffffdfb r6:c061f3e4 r5:ffffffed
 r4:c05ed2e0
 r10:c6847e90 r9:c0032024 r8:c68156c0 r7:c6878000 r6:00000000 r5:c680dee0
 r4:c6868300
[<c003814c>] (kthread) from [<c00090e0>] (ret_from_fork+0x14/0x34)
[<c02d1f18>] (platform_drv_probe) from [<c02d0380>] (driver_probe_device+0x258/0x33c)
Exception stack(0xc6879fb0 to 0xc6879ff8)
9fa0:                                     00000000 00000000 00000000 00000000
 r7:c061f3e4 r6:00000000 r5:c06458d0 r4:c05ed2e0
[<c02d0128>] (driver_probe_device) from [<c02d0510>] (__driver_attach+0xac/0xb0)
9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
 r9:00000000 r8:ffffe000 r7:c05e7008 r6:c05ed314 r5:c061f3e4 r4:c05ed2e0
9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
 r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c003814c
[<c02d0464>] (__driver_attach) from [<c02ce384>] (bus_for_each_dev+0x78/0xbc)
 r7:c05e7008 r6:c02d0464 r5:c061f3e4 r4:00000000
 r4:c680dee0
[<c02ce30c>] (bus_for_each_dev) from [<c02cfcc4>] (driver_attach+0x20/0x28)
 r7:00000000 r6:c061b670 r5:c6ad7960 r4:c061f3e4
[<c02cfca4>] (driver_attach) from [<c02cf704>] (bus_add_driver+0x178/0x20c)
[<c02cf58c>] (bus_add_driver) from [<c02d0f00>] (driver_register+0x80/0xfc)
 r7:00000000 r6:c05c4a30 r5:c05e7008 r4:c061f3e4
[<c02d0e80>] (driver_register) from [<c02d1ebc>] (__platform_driver_register+0x34/0x48)
 r5:c05e7008 r4:c062ae60
[<c02d1e88>] (__platform_driver_register) from [<c05c4a48>] (davinci_mmcsd_driver_init+0x18/0x20)
[<c05c4a30>] (davinci_mmcsd_driver_init) from [<c000a56c>] (do_one_initcall+0x50/0x1a4)
[<c000a51c>] (do_one_initcall) from [<c05a8eb4>] (kernel_init_freeable+0x120/0x1e4)
 r8:c05a8614 r7:c05d4830 r6:00000007 r5:c062ae60 r4:c05e2ae8
[<c05a8d94>] (kernel_init_freeable) from [<c04940f4>] (kernel_init+0x10/0xfc)
 r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c04940e4
random: fast init done
 r4:00000000
[<c04940e4>] (kernel_init) from [<c00090e0>] (ret_from_fork+0x14/0x34)
Exception stack(0xc6839fb0 to 0xc6839ff8)
9fa0:                                     00000000 00000000 00000000 00000000
9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
 r5:c04940e4 r4:00000000
Division by zero in kernel.
CPU: 0 PID: 1 Comm: swapper Not tainted 4.17.0-rc2-08642-g4dee494ef1ee #202
Hardware name: DaVinci DM355 EVM
Backtrace: 
[<c000dfa4>] (dump_backtrace) from [<c000e274>] (show_stack+0x18/0x1c)
 r7:00000000 r6:00000000 r5:fee00000 r4:c6acd800
[<c000e25c>] (show_stack) from [<c047eedc>] (dump_stack+0x20/0x28)
[<c047eebc>] (dump_stack) from [<c000e104>] (__div0+0x18/0x20)
[<c000e0ec>] (__div0) from [<c047d510>] (Ldiv0+0x8/0x10)
[<c0343e48>] (calculate_clk_divider) from [<c0344014>] (mmc_davinci_set_ios+0x58/0x168)
 r9:c6ac6d00 r8:c05ed2e0 r7:00000000 r6:00000001 r5:c6acd9e8 r4:c6acd800
[<c0343fbc>] (mmc_davinci_set_ios) from [<c033057c>] (mmc_power_up.part.8+0xf8/0x110)
 r5:c6acd9e8 r4:c6acd800
[<c0330484>] (mmc_power_up.part.8) from [<c033198c>] (mmc_start_host+0x94/0xa8)
 r7:0000001b r6:c05ed2d0 r5:00000000 r4:c6acd800
[<c03318f8>] (mmc_start_host) from [<c0332c5c>] (mmc_add_host+0x60/0x88)
 r5:00000000 r4:c6acd800
[<c0332bfc>] (mmc_add_host) from [<c0344630>] (davinci_mmcsd_probe+0x3f8/0x5dc)
 r5:c6acdb54 r4:c6acd800
[<c0344238>] (davinci_mmcsd_probe) from [<c02d1f70>] (platform_drv_probe+0x58/0xb4)
 r10:c05a61d4 r9:00000000 r8:00000000 r7:fffffdfb r6:c061f3e4 r5:ffffffed
 r4:c05ed2e0
[<c02d1f18>] (platform_drv_probe) from [<c02d0380>] (driver_probe_device+0x258/0x33c)
 r7:c061f3e4 r6:00000000 r5:c06458d0 r4:c05ed2e0
[<c02d0128>] (driver_probe_device) from [<c02d0510>] (__driver_attach+0xac/0xb0)
 r9:00000000 r8:ffffe000 r7:c05e7008 r6:c05ed314 r5:c061f3e4 r4:c05ed2e0
[<c02d0464>] (__driver_attach) from [<c02ce384>] (bus_for_each_dev+0x78/0xbc)
 r7:c05e7008 r6:c02d0464 r5:c061f3e4 r4:00000000
[<c02ce30c>] (bus_for_each_dev) from [<c02cfcc4>] (driver_attach+0x20/0x28)
 r7:00000000 r6:c061b670 r5:c6ad7960 r4:c061f3e4
[<c02cfca4>] (driver_attach) from [<c02cf704>] (bus_add_driver+0x178/0x20c)
[<c02cf58c>] (bus_add_driver) from [<c02d0f00>] (driver_register+0x80/0xfc)
 r7:00000000 r6:c05c4a30 r5:c05e7008 r4:c061f3e4
[<c02d0e80>] (driver_register) from [<c02d1ebc>] (__platform_driver_register+0x34/0x48)
 r5:c05e7008 r4:c062ae60
[<c02d1e88>] (__platform_driver_register) from [<c05c4a48>] (davinci_mmcsd_driver_init+0x18/0x20)
[<c05c4a30>] (davinci_mmcsd_driver_init) from [<c000a56c>] (do_one_initcall+0x50/0x1a4)
[<c000a51c>] (do_one_initcall) from [<c05a8eb4>] (kernel_init_freeable+0x120/0x1e4)
 r8:c05a8614 r7:c05d4830 r6:00000007 r5:c062ae60 r4:c05e2ae8
[<c05a8d94>] (kernel_init_freeable) from [<c04940f4>] (kernel_init+0x10/0xfc)
 r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c04940e4
 r4:00000000
[<c04940e4>] (kernel_init) from [<c00090e0>] (ret_from_fork+0x14/0x34)
Exception stack(0xc6839fb0 to 0xc6839ff8)
9fa0:                                     00000000 00000000 00000000 00000000
9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
 r5:c04940e4 r4:00000000
Division by zero in kernel.
CPU: 0 PID: 14 Comm: kworker/0:1 Not tainted 4.17.0-rc2-08642-g4dee494ef1ee #202
davinci_mmc dm6441-mmc.1: Using DMA, 4-bit mode
NET: Registered protocol family 10
Hardware name: DaVinci DM355 EVM
Workqueue: events_freezable mmc_rescan
Backtrace: 
[<c000dfa4>] (dump_backtrace) from [<c000e274>] (show_stack+0x18/0x1c)
 r7:00000000 r6:00000000 r5:fee00000 r4:c6acd800
[<c000e25c>] (show_stack) from [<c047eedc>] (dump_stack+0x20/0x28)
Segment Routing with IPv6
sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
NET: Registered protocol family 17
[<c047eebc>] (dump_stack) from [<c000e104>] (__div0+0x18/0x20)
[<c000e0ec>] (__div0) from [<c047d510>] (Ldiv0+0x8/0x10)
[<c0343e48>] (calculate_clk_divider) from [<c0344014>] (mmc_davinci_set_ios+0x58/0x168)
 r9:00000000 r8:c05ff7b0 r7:60000013 r6:c6acd800 r5:c6acd9e8 r4:c6acd800
[<c0343fbc>] (mmc_davinci_set_ios) from [<c0330480>] (mmc_set_initial_state+0x9c/0xa0)
 r5:c6acd9e8 r4:c6acd800
[<c03303e4>] (mmc_set_initial_state) from [<c03307ac>] (mmc_power_off.part.9+0x30/0x44)
 r5:00000000 r4:c6acd800
[<c033077c>] (mmc_power_off.part.9) from [<c03317b0>] (mmc_rescan+0x3b8/0x500)
 r5:00000000 r4:c6acda40
[<c03313f8>] (mmc_rescan) from [<c0031de0>] (process_one_work+0x1d8/0x41c)
 r9:00000000 r8:c05ff7b0 r7:00000000 r6:c7ee9500 r5:c68156c0 r4:c6acda40
[<c0031c08>] (process_one_work) from [<c0032060>] (worker_thread+0x3c/0x670)
 r10:00000008 r9:c05ff7c4 r8:c060f080 r7:c68156d8 r6:ffffe000 r5:c05ff7b0
 r4:c68156c0
[<c0032024>] (worker_thread) from [<c0038280>] (kthread+0x134/0x14c)
 r10:c6847e90 r9:c0032024 r8:c68156c0 r7:c6878000 r6:00000000 r5:c680dee0
 r4:c6868300
[<c003814c>] (kthread) from [<c00090e0>] (ret_from_fork+0x14/0x34)
Exception stack(0xc6879fb0 to 0xc6879ff8)
9fa0:                                     00000000 00000000 00000000 00000000
9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
 r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c003814c
 r4:c680dee0
console [netcon0] enabled
netconsole: network logging started
hctosys: unable to open rtc device (rtc0)
dm9000 dm9000 eth0: link down
IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
Sending DHCP requests .
dm9000 dm9000 eth0: link up, 100Mbps, full-duplex, lpa 0x45E1
, OK
IP-Config: Got DHCP answer from 172.24.188.3, my address is 172.24.190.9
IP-Config: Complete:
     device=eth0, hwaddr=00:0e:99:02:cb:91, ipaddr=172.24.190.9, mask=255.255.252.0, gw=172.24.188.1
     host=172.24.190.9, domain=india.ti.com, nis-domain=(none)
     bootserver=0.0.0.0, rootserver=172.24.210.141, rootpath=     nameserver0=192.0.2.2, nameserver1=192.0.2.3
 this is MT29F16G08FAA device
David Lechner May 3, 2018, 3:44 p.m. UTC | #2
On 05/03/2018 10:34 AM, Sekhar Nori wrote:
> On Friday 27 April 2018 05:47 AM, David Lechner wrote:
>> This adds the new board-specific clock init in mach-davinci/dm355.c
>> using the new common clock framework drivers.
>>
>> The #ifdefs are needed to prevent compile errors until the entire
>> ARCH_DAVINCI is converted.
>>
>> Also clean up the #includes since we are adding some here.
>>
>> Signed-off-by: David Lechner <david@lechnology.com>
> 
> I am having trouble booting DM355 EVM with the series applied.
> Still to debug what is going wrong.

Can you dump the PLL registers using /sys/kernel/debug/clk/... ?
Sekhar Nori May 4, 2018, 10:01 a.m. UTC | #3
On Thursday 03 May 2018 09:14 PM, David Lechner wrote:
> On 05/03/2018 10:34 AM, Sekhar Nori wrote:
>> On Friday 27 April 2018 05:47 AM, David Lechner wrote:
>>> This adds the new board-specific clock init in mach-davinci/dm355.c
>>> using the new common clock framework drivers.
>>>
>>> The #ifdefs are needed to prevent compile errors until the entire
>>> ARCH_DAVINCI is converted.
>>>
>>> Also clean up the #includes since we are adding some here.
>>>
>>> Signed-off-by: David Lechner <david@lechnology.com>
>>
>> I am having trouble booting DM355 EVM with the series applied.
>> Still to debug what is going wrong.
> 
> Can you dump the PLL registers using /sys/kernel/debug/clk/... ?

I was able to get to ramdisk shell if I set clk_ignore_unused. Here is 
the dump:

root@dm355-evm:/sys/kernel/debug# cat clk/clk_summary 
                                 enable  prepare  protect                               
   clock                          count    count    count        rate   accuracy   phase
----------------------------------------------------------------------------------------
 ref_clk                              1        1        0    24000000          0 0  
    oscin                             3        3        0    24000000          0 0  
       pll2_sysclkbp                  0        0        0     3000000          0 0  
       pll2_prediv                    2        2        0     3000000          0 0  
          pll2_pllout                 1        1        0   342000000          0 0  
             pll2_postdiv             1        1        0   342000000          0 0  
                pll2_pllen            0        0        0   342000000          0 0  
       pll1_sysclkbp                  0        0        0     8000000          0 0  
       pll1_auxclk                    4        5        0    24000000          0 0  
          timer2                      1        4        0    24000000          0 0  
          timer1                      0        0        0    24000000          0 0  
          timer0                      2        2        0    24000000          0 0  
          pwm2                        0        0        0    24000000          0 0  
          pwm1                        0        0        0    24000000          0 0  
          pwm0                        0        0        0    24000000          0 0  
          uart1                       1        4        0    24000000          0 0  
          uart0                       1        4        0    24000000          0 0  
          i2c                         0        3        0    24000000          0 0  
          rto                         0        0        0    24000000          0 0  
          pwm3                        0        0        0    24000000          0 0  
          timer3                      0        0        0    24000000          0 0  
       pll1_prediv                    2        2        0     3000000          0 0  
          pll1_pllout                 1        1        0   432000000          0 0  
             pll1_postdiv             1        1        0   432000000          0 0  
                pll1_pllen            0        0        0   432000000          0 0  
 pll2_sysclk2                         1        1        0           0          0 0  
 pll2_sysclk1                         0        0        0           0          0 0  
 pll1_sysclk4                         1        3        0           0          0 0  
    vpss_slave                        0        1        0           0          0 0  
    vpss_master                       0        1        0           0          0 0  
 pll1_sysclk3                         1        1        0           0          0 0  
    vpss_dac                          0        0        0           0          0 0  
 pll1_sysclk2                         4        5        0           0          0 0  
    gpio                              1        1        0           0          0 0  
    spi0                              0        3        0           0          0 0  
    uart2                             1        4        0           0          0 0  
    asp0                              0        0        0           0          0 0  
    mmcsd0                            0        0        0           0          0 0  
    aemif                             1        1        0           0          0 0  
    spi2                              0        0        0           0          0 0  
    usb                               0        0        0           0          0 0  
    asp1                              0        0        0           0          0 0  
    mmcsd1                            0        0        0           0          0 0  
    spi1                              0        0        0           0          0 0  
 pll1_sysclk1                         2        2        0           0          0 0  
    mjcp                              0        0        0           0          0 0  
    arm                               1        1        0           0          0 0  

and the dump with current master:

root@dm355-evm:/sys/kernel/debug# cat davinci_clocks 
ref_clk           users= 7      24000000 Hz
  pll1            users= 7 pll 432000000 Hz
    pll1_sysclk1  users= 1 pll 216000000 Hz
      arm_clk     users= 1 psc 216000000 Hz
      mjcp        users= 0 psc 216000000 Hz
    pll1_sysclk2  users= 3 pll 108000000 Hz
      uart2       users= 1 psc 108000000 Hz
      asp0        users= 0 psc 108000000 Hz
      asp1        users= 0 psc 108000000 Hz
      mmcsd0      users= 0 psc 108000000 Hz
      mmcsd1      users= 0 psc 108000000 Hz
      spi0        users= 0 psc 108000000 Hz
      spi1        users= 0 psc 108000000 Hz
      spi2        users= 0 psc 108000000 Hz
      gpio        users= 1 psc 108000000 Hz
      aemif       users= 1 psc 108000000 Hz
      usb         users= 0 psc 108000000 Hz
    pll1_sysclk3  users= 0 pll  27000000 Hz
      vpss_dac    users= 0 psc  27000000 Hz
    pll1_sysclk4  users= 0 pll 108000000 Hz
      vpss_master users= 0 psc 108000000 Hz
      vpss_slave  users= 0 psc 108000000 Hz
    pll1_aux_clk  users= 3 pll  24000000 Hz
      clkout1     users= 0      24000000 Hz
      uart0       users= 1 psc  24000000 Hz
      uart1       users= 1 psc  24000000 Hz
      i2c         users= 0 psc  24000000 Hz
      pwm0        users= 0 psc  24000000 Hz
      pwm1        users= 0 psc  24000000 Hz
      pwm2        users= 0 psc  24000000 Hz
      pwm3        users= 0 psc  24000000 Hz
      timer0      users= 1 psc  24000000 Hz
      timer1      users= 0 psc  24000000 Hz
      timer2      users= 1 psc  24000000 Hz
      timer3      users= 0 psc  24000000 Hz
      rto         users= 0 psc  24000000 Hz
    pll1_sysclkbp users= 0 pll   8000000 Hz
      clkout2     users= 0       8000000 Hz
  pll2            users= 0 pll 342000000 Hz
    pll2_sysclk1  users= 0 pll 342000000 Hz
    pll2_sysclkbp users= 0 pll   3000000 Hz
      clkout3     users= 0       3000000 Hz

I didn't have time today to analyze these myself. Hope it helps.

Thanks,
Sekhar
David Lechner May 4, 2018, 2:26 p.m. UTC | #4
On 05/04/2018 05:01 AM, Sekhar Nori wrote:
> On Thursday 03 May 2018 09:14 PM, David Lechner wrote:
>> On 05/03/2018 10:34 AM, Sekhar Nori wrote:
>>> On Friday 27 April 2018 05:47 AM, David Lechner wrote:
>>>> This adds the new board-specific clock init in mach-davinci/dm355.c
>>>> using the new common clock framework drivers.
>>>>
>>>> The #ifdefs are needed to prevent compile errors until the entire
>>>> ARCH_DAVINCI is converted.
>>>>
>>>> Also clean up the #includes since we are adding some here.
>>>>
>>>> Signed-off-by: David Lechner <david@lechnology.com>
>>>
>>> I am having trouble booting DM355 EVM with the series applied.
>>> Still to debug what is going wrong.
>>
>> Can you dump the PLL registers using /sys/kernel/debug/clk/... ?
> 
> I was able to get to ramdisk shell if I set clk_ignore_unused. Here is
> the dump:
> 

...

> I didn't have time today to analyze these myself. Hope it helps.
> 

I just sent out a patch to fix this: "clk: davinci: pll-dm355: fix
SYSCLKn parent names".
diff mbox

Patch

diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index cb30637d9eaf..ea03ddcd35f5 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -384,6 +384,8 @@  static __init void dm355_evm_init(void)
 	struct clk *aemif;
 	int ret;
 
+	dm355_register_clocks();
+
 	ret = dm355_gpio_register();
 	if (ret)
 		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index 59743bd76793..09f82160bbed 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -233,6 +233,8 @@  static __init void dm355_leopard_init(void)
 	struct clk *aemif;
 	int ret;
 
+	dm355_register_clocks();
+
 	ret = dm355_gpio_register();
 	if (ret)
 		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 376cdd51ce9d..c2c634b6578e 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -84,6 +84,7 @@  int davinci_init_wdt(void);
 /* DM355 function declarations */
 void dm355_init(void);
 void dm355_init_time(void);
+void dm355_register_clocks(void);
 void dm355_init_spi0(unsigned chipselect_mask,
 		const struct spi_board_info *info, unsigned len);
 void dm355_init_asp1(u32 evt_enable);
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 0da7516018ca..14014b942e8a 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -8,31 +8,37 @@ 
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/serial_8250.h>
-#include <linux/platform_device.h>
+
+#include <linux/clk-provider.h>
+#include <linux/clk/davinci.h>
+#include <linux/clkdev.h>
 #include <linux/dma-mapping.h>
 #include <linux/dmaengine.h>
-#include <linux/spi/spi.h>
+#include <linux/init.h>
 #include <linux/platform_data/edma.h>
 #include <linux/platform_data/gpio-davinci.h>
 #include <linux/platform_data/spi-davinci.h>
+#include <linux/platform_device.h>
+#include <linux/serial_8250.h>
+#include <linux/spi/spi.h>
 
 #include <asm/mach/map.h>
 
+#include <mach/common.h>
 #include <mach/cputype.h>
-#include "psc.h"
-#include <mach/mux.h>
 #include <mach/irqs.h>
-#include <mach/time.h>
+#include <mach/mux.h>
 #include <mach/serial.h>
-#include <mach/common.h>
+#include <mach/time.h>
 
+#include "asp.h"
 #include "davinci.h"
-#include "clock.h"
 #include "mux.h"
-#include "asp.h"
+
+#ifndef CONFIG_COMMON_CLK
+#include "clock.h"
+#include "psc.h"
+#endif
 
 #define DM355_UART2_BASE	(IO_PHYS + 0x206000)
 #define DM355_OSD_BASE		(IO_PHYS + 0x70200)
@@ -43,6 +49,7 @@ 
  */
 #define DM355_REF_FREQ		24000000	/* 24 or 36 MHz */
 
+#ifndef CONFIG_COMMON_CLK
 static struct pll_data pll1_data = {
 	.num       = 1,
 	.phys_base = DAVINCI_PLL1_BASE,
@@ -382,7 +389,7 @@  static struct clk_lookup dm355_clks[] = {
 	CLK(NULL, "usb", &usb_clk),
 	CLK(NULL, NULL, NULL),
 };
-
+#endif
 /*----------------------------------------------------------------------*/
 
 static u64 dm355_spi0_dma_mask = DMA_BIT_MASK(32);
@@ -1046,8 +1053,46 @@  void __init dm355_init(void)
 
 void __init dm355_init_time(void)
 {
+#ifdef CONFIG_COMMON_CLK
+	void __iomem *pll1, *psc;
+	struct clk *clk;
+
+	clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM355_REF_FREQ);
+
+	pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K);
+	dm355_pll1_init(NULL, pll1, NULL);
+
+	psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
+	dm355_psc_init(NULL, psc);
+
+	clk = clk_get(NULL, "timer0");
+
+	davinci_timer_init(clk);
+#else
 	davinci_clk_init(dm355_clks);
 	davinci_timer_init(&timer0_clk);
+#endif
+}
+
+static struct resource dm355_pll2_resources[] = {
+	{
+		.start	= DAVINCI_PLL2_BASE,
+		.end	= DAVINCI_PLL2_BASE + SZ_1K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device dm355_pll2_device = {
+	.name		= "dm355-pll2",
+	.id		= -1,
+	.resource	= dm355_pll2_resources,
+	.num_resources	= ARRAY_SIZE(dm355_pll2_resources),
+};
+
+void __init dm355_register_clocks(void)
+{
+	/* PLL1 and PSC are registered in dm355_init_time() */
+	platform_device_register(&dm355_pll2_device);
 }
 
 int __init dm355_init_video(struct vpfe_config *vpfe_cfg,