From patchwork Sun May 20 10:15:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 10413347 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A0780602A0 for ; Sun, 20 May 2018 10:18:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 837C324603 for ; Sun, 20 May 2018 10:18:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 74367280FC; Sun, 20 May 2018 10:18:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, DKIM_VALID, FREEMAIL_FROM, MAILING_LIST_MULTI autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D1F3924603 for ; Sun, 20 May 2018 10:18:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=rozxa9asJL22cdx0JkGIS3cCQBDk4x9FnTUF3iBEHXE=; b=LIIz/wTjQvsEKJN7HJ2vjlGL4v 17poQZcd9dVToCLAf2zGRiCcLgcI3neA358ZpQwyXbSTaz2LoCIz3czNFf5z+PsP2hf1Z4+yFjuBk Fyy1sWNUlzhcxmifQWsOezmr6z34dBt6KpKPHIYjmZ8J9SOMGGI9iqMBubXJ5ESYmP6AiBv2s+RPG ikHaXnvnA0YJq9ybjp15P9wvsk64HduCS8ud4HR6jzph44ypdm9NzFfONcfpyQo+OOGph0TWI8clP 6OpnYcbkFp0TV4xCVHPsVyg97qrBIT3unLMnIFkcXILfsRGLSua7MCRMwveCxyvfglL/8QrCcUWwg PCqo6L0Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fKLPq-0000mX-8s; Sun, 20 May 2018 10:18:14 +0000 Received: from mail-lf0-x243.google.com ([2a00:1450:4010:c07::243]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fKLOE-00081N-OL for linux-arm-kernel@lists.infradead.org; Sun, 20 May 2018 10:16:37 +0000 Received: by mail-lf0-x243.google.com with SMTP id b18-v6so19860327lfa.9 for ; Sun, 20 May 2018 03:16:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7hNMokYuIbCV1qtjnbNprjMafUaJbVPuYO8Wczx5jSk=; b=lsc3KuqzzFnHGF3TMUOoBmd8tAumvMJUd0Sl8VcFyo0ZMRaMEXivlWENJLM3f9dRmj fhU4J92Dx7mvv+wGaEqxkj071Pm+MhBKRG+7t2YKtdJV/OT3qxYwuUnRp/IJtA6jvwfN HjWM3PC5Zc4/H/5Mn5HYah7nGcDQGgDDDRUH+/SevkbMSz7lCXohS445xWCMNbR3C9jT LCc8KRl1bt7VZYhMg73bbSRk+6kclAEMZSGjnQVgpRYab8nEdHqZKHvj1rtjK3UUf6cz Xej4B8P2Vm9jZKIVgXgm2orwOhRNptK9UyS5YXzZGd4HiR1KODiP0wALPx2ii9paU0Cw miiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7hNMokYuIbCV1qtjnbNprjMafUaJbVPuYO8Wczx5jSk=; b=J9SjLxIMQ5v13mIV+BY/uEPFaQZCEZG4kuATv8mXivRG7q46Lu+5AvfFepEh1CdCP6 TvLmTL2rRI3HGqc74d2lXTx0g9jN1cInVUt0kprhtV41ZmgLUbQNzMfc8qSTZ8StCVAN sSbPOIRECJ4ycZvYZxdq/kLtlftvOuObE6ONeW6puBiiwO4LzRDnJj2cREMqv/lpnPaq Wox0SfxEJy9BE35smeYjXiN5iJoyagPtyr3eVYlX+zIHCPvt1dB0UOqP1OpAhdQDIoCG iANvrncwPRRmjqOMm48UQ6e8/PbJV4Yh64fURXJbh3PCVRbqaVVakP/dlnDBieWYE3BK b8Aw== X-Gm-Message-State: ALKqPwcU6nRCM/J+X5H/GNc81U18qZ2A8vlkPIpkENZ6wubiSiPmldU/ SQrRwKd1g74dReStwE/jGlw= X-Google-Smtp-Source: AB8JxZrZcdthyM3dCAmYTuZUm0EwlEEg7vYYeMfRcFb92pCMRBlCHNRdaRtpculORDivA2hetkWEQA== X-Received: by 2002:a19:c350:: with SMTP id t77-v6mr24079914lff.127.1526811385865; Sun, 20 May 2018 03:16:25 -0700 (PDT) Received: from localhost.localdomain (109-252-91-60.nat.spd-mgts.ru. [109.252.91.60]) by smtp.gmail.com with ESMTPSA id p18-v6sm2627836lfd.91.2018.05.20.03.16.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 20 May 2018 03:16:25 -0700 (PDT) From: Dmitry Osipenko To: Russell King , Thierry Reding , Jonathan Hunter Subject: [PATCH v1 4/5] ARM: tegra: Don't apply CPU erratas in insecure mode Date: Sun, 20 May 2018 13:15:41 +0300 Message-Id: <20180520101542.12206-5-digetx@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180520101542.12206-1-digetx@gmail.com> References: <20180520101542.12206-1-digetx@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180520_031634_800786_1FD95C0C X-CRM114-Status: GOOD ( 14.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, Peter Geis , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, =?UTF-8?q?Micha=C5=82=20Miros=C5=82aw?= MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP CPU isn't allowed to touch secure registers while running under secure monitor. Hence skip applying CPU erratas in the reset handler if Trusted Foundations firmware presents. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/reset-handler.S | 27 +++++++++++++++++++-------- arch/arm/mach-tegra/reset.c | 3 +++ arch/arm/mach-tegra/reset.h | 4 +++- 3 files changed, 25 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index 805f306fa6f7..d84c74a95806 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -121,6 +121,12 @@ ENTRY(__tegra_cpu_reset_handler) cpsid aif, 0x13 @ SVC mode, interrupts disabled tegra_get_soc_id TEGRA_APB_MISC_BASE, r6 + + adr r12, __tegra_cpu_reset_handler_data + ldr r0, [r12, #RESET_DATA(TF_PRESENT)] + cmp r0, #0 + bne after_errata + #ifdef CONFIG_ARCH_TEGRA_2x_SOC t20_check: cmp r6, #TEGRA20 @@ -155,7 +161,6 @@ after_errata: and r10, r10, #0x3 @ R10 = CPU number mov r11, #1 mov r11, r11, lsl r10 @ R11 = CPU mask - adr r12, __tegra_cpu_reset_handler_data #ifdef CONFIG_SMP /* Does the OS know about this CPU? */ @@ -169,10 +174,9 @@ after_errata: cmp r6, #TEGRA20 bne 1f /* If not CPU0, don't let CPU0 reset CPU1 now that CPU1 is coming up. */ - mov32 r5, TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET mov r0, #CPU_NOT_RESETTABLE cmp r10, #0 - strneb r0, [r5, #__tegra20_cpu1_resettable_status_offset] + strneb r0, [r12, #RESET_DATA(RESETTABLE_STATUS)] 1: #endif @@ -278,13 +282,20 @@ ENDPROC(__tegra_cpu_reset_handler) .type __tegra_cpu_reset_handler_data, %object .globl __tegra_cpu_reset_handler_data __tegra_cpu_reset_handler_data: - .rept TEGRA_RESET_DATA_SIZE - .long 0 - .endr + .long 0 /* TEGRA_RESET_MASK_PRESENT */ + .long 0 /* TEGRA_RESET_MASK_LP1 */ + .long 0 /* TEGRA_RESET_MASK_LP2 */ + .long 0 /* TEGRA_RESET_STARTUP_SECONDARY */ + .long 0 /* TEGRA_RESET_STARTUP_LP2 */ + .long 0 /* TEGRA_RESET_STARTUP_LP1 */ + .globl __tegra20_cpu1_resettable_status_offset .equ __tegra20_cpu1_resettable_status_offset, \ . - __tegra_cpu_reset_handler_start - .byte 0 - .align L1_CACHE_SHIFT + .long 0 /* TEGRA_RESET_RESETTABLE_STATUS */ + .globl __tegra_tf_present + .equ __tegra_tf_present, . - __tegra_cpu_reset_handler_start + .long 0 /* TEGRA_RESET_TF_PRESENT */ + .align L1_CACHE_SHIFT ENTRY(__tegra_cpu_reset_handler_end) diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c index dc558892753c..b02ae7699842 100644 --- a/arch/arm/mach-tegra/reset.c +++ b/arch/arm/mach-tegra/reset.c @@ -24,6 +24,7 @@ #include #include #include +#include #include "iomap.h" #include "irammap.h" @@ -89,6 +90,8 @@ static void __init tegra_cpu_reset_handler_enable(void) void __init tegra_cpu_reset_handler_init(void) { + __tegra_cpu_reset_handler_data[TEGRA_RESET_TF_PRESENT] = + trusted_foundations_registered(); #ifdef CONFIG_SMP __tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_PRESENT] = diff --git a/arch/arm/mach-tegra/reset.h b/arch/arm/mach-tegra/reset.h index 9c479c7925b8..0d9ddc022ece 100644 --- a/arch/arm/mach-tegra/reset.h +++ b/arch/arm/mach-tegra/reset.h @@ -25,7 +25,9 @@ #define TEGRA_RESET_STARTUP_SECONDARY 3 #define TEGRA_RESET_STARTUP_LP2 4 #define TEGRA_RESET_STARTUP_LP1 5 -#define TEGRA_RESET_DATA_SIZE 6 +#define TEGRA_RESET_RESETTABLE_STATUS 6 +#define TEGRA_RESET_TF_PRESENT 7 +#define TEGRA_RESET_DATA_SIZE 8 #ifndef __ASSEMBLY__