From patchwork Tue May 22 09:40:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 10417757 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 01EBE60224 for ; Tue, 22 May 2018 09:45:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E55F528B8B for ; Tue, 22 May 2018 09:45:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D8BEE28B92; Tue, 22 May 2018 09:45:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5CEF528B8B for ; Tue, 22 May 2018 09:45:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=GDuzIM8aLMcCh0damaHRaUPO2bcrjtzhFp80eMQn5Yc=; b=IMtgri3CY3ywDhZv65xCHXGjOM d3f51jK4kytOS2SKjjOaWcypkVpq4CUTrhWCMsoeOiY7r/6r4LC1YY1vD+jIRST0z+xV8E8ZceJQn e4um34zPfpt47bujgrvccGxwTUuRL+yKEzHCnj6yesH+tETNdf+ZS7OkOQy+2sVS1j7jKq3KIlye6 C5WUdngJD0qMS3KbrfmCmx5u0estgmj9V3CvrthyDKEClATwSxyRM9D1qfF8U8/9uGssm0BhFi0uW abAWZRRqukGUWRzpab9f2Npch5lgv91ZPRxNaymsShajyV4vZl4h3Y7tX73rdpHM6N+4z7ZieURNm VQ6aaGUg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fL3qy-0004dc-Dv; Tue, 22 May 2018 09:45:12 +0000 Received: from mail.bootlin.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fL3nB-0001pc-Vf for linux-arm-kernel@lists.infradead.org; Tue, 22 May 2018 09:41:35 +0000 Received: by mail.bootlin.com (Postfix, from userid 110) id E6EAA2086F; Tue, 22 May 2018 11:40:59 +0200 (CEST) Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.bootlin.com (Postfix) with ESMTPSA id AD47D207E6; Tue, 22 May 2018 11:40:48 +0200 (CEST) From: Miquel Raynal To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Catalin Marinas , Will Deacon , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth Subject: [PATCH v2 13/16] dt-bindings/interrupt-controller: add documentation for Marvell SEI controller Date: Tue, 22 May 2018 11:40:39 +0200 Message-Id: <20180522094042.24770-14-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180522094042.24770-1-miquel.raynal@bootlin.com> References: <20180522094042.24770-1-miquel.raynal@bootlin.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180522_024118_411526_2C72D9AF X-CRM114-Status: GOOD ( 16.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Haim Boot , Antoine Tenart , Hanna Hawa , linux-kernel@vger.kernel.org, Maxime Chevallier , Nadav Haklai , Rob Herring , Thomas Petazzoni , Miquel Raynal , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Describe the System Error Interrupt (SEI) controller. It aggregates two types of interrupts, wired and MSIs from respectively the AP and the CPs, into a single SPI interrupt. Suggested-by: Haim Boot Signed-off-by: Miquel Raynal --- .../bindings/interrupt-controller/marvell,sei.txt | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt new file mode 100644 index 000000000000..689981036c30 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt @@ -0,0 +1,50 @@ +Marvell SEI (System Error Interrupt) Controller +----------------------------------------------- + +Marvell SEI (System Error Interrupt) controller is an interrupt +aggregator. It receives interrupts from several sources and aggregates +them to a single interrupt line (an SPI) on the parent interrupt +controller. + +This interrupt controller can handle up to 64 SEIs, a set comes from the +AP and is wired while a second set comes from the CPs by the mean of +MSIs. Each 'domain' is represented as a subnode. + +Required properties: + +- compatible: should be "marvell,armada-8k-sei". +- reg: SEI registers location and length. +- interrupts: identifies the parent IRQ that will be triggered. + +Child node 'sei-wired-controller' required properties: + +- marvell,sei-ranges: ranges of wired interrupts. +- #interrupt-cells: number of cells to define an SEI wired interrupt + coming from the AP, should be 1. The cell is the IRQ + number. +- interrupt-controller: identifies the node as an interrupt controller. + +Child node 'sei-msi-controller' required properties: + +- marvell,sei-ranges: ranges of non-wired interrupts triggered by way of + MSIs. +- msi-controller: identifies the node as an MSI controller. + +Example: + + sei: sei@3f0200 { + compatible = "marvell,armada-8k-sei"; + reg = <0x3f0200 0x40>; + interrupts = ; + + sei_wired_controller: sei-wired-controller@0 { + marvell,sei-ranges = <0 21>; + #interrupt-cells = <1>; + interrupt-controller; + }; + + sei_msi_controller: sei-msi-controller@21 { + marvell,sei-ranges = <21 43>; + msi-controller; + }; + };