From patchwork Tue May 22 09:40:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 10417777 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8583F60224 for ; Tue, 22 May 2018 09:49:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7458328B9C for ; Tue, 22 May 2018 09:49:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 684A428BA3; Tue, 22 May 2018 09:49:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9148328B9C for ; Tue, 22 May 2018 09:49:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=H0OucK0Q5beu9k8xJOQuEi8qms2d25gJZk5JxWtuphI=; b=DixCGP23KcGwFmteCOww0DxYnn skFixolp9lEJ9SSvM9EqORx9FqIEXV/P37Vs51KclZVETRXo8NnngQ0eP6cKbO2phW9uKdyer4INx Y2N7n6SBDuA2BpHOeCTz/+04XB9Ky8XNxDRvXyC+j90BSQhMGYeRBuE8Jf2HLypyAWbLrJuqeNndL w4xTIuWUAHb8MqSQzNa16S/JUEnq/GPFgb+tKYoYKVDkTcBCkLsBLo9LmjD0nqNYl3RFhAWWlpdg0 PBEsI/r2R0I9/BclEvmyznjHgf2gxhDNqJJYLFHr94qMDrbPbC9mlMx7+LCT3BxQ87/EKbm//JkdR zbMrNuoA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fL3up-0007rz-5G; Tue, 22 May 2018 09:49:11 +0000 Received: from mail.bootlin.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fL3nH-0001pD-MF for linux-arm-kernel@lists.infradead.org; Tue, 22 May 2018 09:41:43 +0000 Received: by mail.bootlin.com (Postfix, from userid 110) id 8B5B5208F6; Tue, 22 May 2018 11:41:03 +0200 (CEST) Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.bootlin.com (Postfix) with ESMTPSA id 93D3220874; Tue, 22 May 2018 11:40:49 +0200 (CEST) From: Miquel Raynal To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Catalin Marinas , Will Deacon , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth Subject: [PATCH v2 15/16] arm64: dts: marvell: use new bindings for CP110 interrupts Date: Tue, 22 May 2018 11:40:41 +0200 Message-Id: <20180522094042.24770-16-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180522094042.24770-1-miquel.raynal@bootlin.com> References: <20180522094042.24770-1-miquel.raynal@bootlin.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180522_024124_046644_6F97FFBC X-CRM114-Status: GOOD ( 17.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Haim Boot , Antoine Tenart , Hanna Hawa , linux-kernel@vger.kernel.org, Maxime Chevallier , Nadav Haklai , Rob Herring , Thomas Petazzoni , Miquel Raynal , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Create an ICU subnode for the NSR interrupts. This subnode becomes the CP110 interrupt parent, removing the need for the ICU_GRP_NSR parameter. Move all DT110 nodes to use these new bindings. Signed-off-by: Miquel Raynal --- arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 114 +++++++++++++------------- 1 file changed, 59 insertions(+), 55 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi index 9fa41c54f69c..5637ff2601c9 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi @@ -25,7 +25,7 @@ #address-cells = <2>; #size-cells = <2>; compatible = "simple-bus"; - interrupt-parent = <&CP110_LABEL(icu)>; + interrupt-parent = <&CP110_LABEL(icu_nsr)>; ranges; config-space@CP110_BASE { @@ -46,12 +46,12 @@ dma-coherent; CP110_LABEL(eth0): eth0 { - interrupts = , - , - , - , - , - ; + interrupts = <39 IRQ_TYPE_LEVEL_HIGH>, + <43 IRQ_TYPE_LEVEL_HIGH>, + <47 IRQ_TYPE_LEVEL_HIGH>, + <51 IRQ_TYPE_LEVEL_HIGH>, + <55 IRQ_TYPE_LEVEL_HIGH>, + <129 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2", "tx-cpu3", "rx-shared", "link"; port-id = <0>; @@ -60,12 +60,12 @@ }; CP110_LABEL(eth1): eth1 { - interrupts = , - , - , - , - , - ; + interrupts = <40 IRQ_TYPE_LEVEL_HIGH>, + <44 IRQ_TYPE_LEVEL_HIGH>, + <48 IRQ_TYPE_LEVEL_HIGH>, + <52 IRQ_TYPE_LEVEL_HIGH>, + <56 IRQ_TYPE_LEVEL_HIGH>, + <128 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2", "tx-cpu3", "rx-shared", "link"; port-id = <1>; @@ -74,12 +74,12 @@ }; CP110_LABEL(eth2): eth2 { - interrupts = , - , - , - , - , - ; + interrupts = <41 IRQ_TYPE_LEVEL_HIGH>, + <45 IRQ_TYPE_LEVEL_HIGH>, + <49 IRQ_TYPE_LEVEL_HIGH>, + <53 IRQ_TYPE_LEVEL_HIGH>, + <57 IRQ_TYPE_LEVEL_HIGH>, + <127 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2", "tx-cpu3", "rx-shared", "link"; port-id = <2>; @@ -147,16 +147,20 @@ CP110_LABEL(icu): interrupt-controller@1e0000 { compatible = "marvell,cp110-icu"; reg = <0x1e0000 0x440>; - #interrupt-cells = <3>; - interrupt-controller; - msi-parent = <&gicp>; + + CP110_LABEL(icu_nsr): icu-nsr { + compatible = "marvell,cp110-icu-nsr"; + #interrupt-cells = <2>; + interrupt-controller; + msi-parent = <&gicp>; + }; }; CP110_LABEL(rtc): rtc@284000 { compatible = "marvell,armada-8k-rtc"; reg = <0x284000 0x20>, <0x284080 0x24>; reg-names = "rtc", "rtc-soc"; - interrupts = ; + interrupts = <77 IRQ_TYPE_LEVEL_HIGH>; }; CP110_LABEL(thermal): thermal@400078 { @@ -182,10 +186,10 @@ #gpio-cells = <2>; gpio-ranges = <&CP110_LABEL(pinctrl) 0 0 32>; interrupt-controller; - interrupts = , - , - , - ; + interrupts = <86 IRQ_TYPE_LEVEL_HIGH>, + <85 IRQ_TYPE_LEVEL_HIGH>, + <84 IRQ_TYPE_LEVEL_HIGH>, + <83 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -197,10 +201,10 @@ #gpio-cells = <2>; gpio-ranges = <&CP110_LABEL(pinctrl) 0 32 31>; interrupt-controller; - interrupts = , - , - , - ; + interrupts = <82 IRQ_TYPE_LEVEL_HIGH>, + <81 IRQ_TYPE_LEVEL_HIGH>, + <80 IRQ_TYPE_LEVEL_HIGH>, + <79 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; }; @@ -210,7 +214,7 @@ "generic-xhci"; reg = <0x500000 0x4000>; dma-coherent; - interrupts = ; + interrupts = <106 IRQ_TYPE_LEVEL_HIGH>; clock-names = "core", "reg"; clocks = <&CP110_LABEL(clk) 1 22>, <&CP110_LABEL(clk) 1 16>; @@ -222,7 +226,7 @@ "generic-xhci"; reg = <0x510000 0x4000>; dma-coherent; - interrupts = ; + interrupts = <105 IRQ_TYPE_LEVEL_HIGH>; clock-names = "core", "reg"; clocks = <&CP110_LABEL(clk) 1 23>, <&CP110_LABEL(clk) 1 16>; @@ -233,7 +237,7 @@ compatible = "marvell,armada-8k-ahci", "generic-ahci"; reg = <0x540000 0x30000>; - interrupts = ; + interrupts = <107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&CP110_LABEL(clk) 1 15>, <&CP110_LABEL(clk) 1 16>; status = "disabled"; @@ -286,7 +290,7 @@ reg = <0x701000 0x20>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; + interrupts = <120 IRQ_TYPE_LEVEL_HIGH>; clock-names = "core", "reg"; clocks = <&CP110_LABEL(clk) 1 21>, <&CP110_LABEL(clk) 1 17>; @@ -298,7 +302,7 @@ reg = <0x701100 0x20>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; + interrupts = <121 IRQ_TYPE_LEVEL_HIGH>; clock-names = "core", "reg"; clocks = <&CP110_LABEL(clk) 1 21>, <&CP110_LABEL(clk) 1 17>; @@ -309,7 +313,7 @@ compatible = "snps,dw-apb-uart"; reg = <0x702000 0x100>; reg-shift = <2>; - interrupts = ; + interrupts = <122 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; clock-names = "baudclk", "apb_pclk"; clocks = <&CP110_LABEL(clk) 1 21>, @@ -321,7 +325,7 @@ compatible = "snps,dw-apb-uart"; reg = <0x702100 0x100>; reg-shift = <2>; - interrupts = ; + interrupts = <123 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; clock-names = "baudclk", "apb_pclk"; clocks = <&CP110_LABEL(clk) 1 21>, @@ -333,7 +337,7 @@ compatible = "snps,dw-apb-uart"; reg = <0x702200 0x100>; reg-shift = <2>; - interrupts = ; + interrupts = <124 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; clock-names = "baudclk", "apb_pclk"; clocks = <&CP110_LABEL(clk) 1 21>, @@ -345,7 +349,7 @@ compatible = "snps,dw-apb-uart"; reg = <0x702300 0x100>; reg-shift = <2>; - interrupts = ; + interrupts = <125 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; clock-names = "baudclk", "apb_pclk"; clocks = <&CP110_LABEL(clk) 1 21>, @@ -364,7 +368,7 @@ reg = <0x720000 0x54>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; + interrupts = <115 IRQ_TYPE_LEVEL_HIGH>; clock-names = "core", "reg"; clocks = <&CP110_LABEL(clk) 1 2>, <&CP110_LABEL(clk) 1 17>; @@ -376,7 +380,7 @@ compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76"; reg = <0x760000 0x7d>; - interrupts = ; + interrupts = <95 IRQ_TYPE_LEVEL_HIGH>; clock-names = "core", "reg"; clocks = <&CP110_LABEL(clk) 1 25>, <&CP110_LABEL(clk) 1 17>; @@ -386,7 +390,7 @@ CP110_LABEL(sdhci0): sdhci@780000 { compatible = "marvell,armada-cp110-sdhci"; reg = <0x780000 0x300>; - interrupts = ; + interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; clock-names = "core", "axi"; clocks = <&CP110_LABEL(clk) 1 4>, <&CP110_LABEL(clk) 1 18>; dma-coherent; @@ -396,12 +400,12 @@ CP110_LABEL(crypto): crypto@800000 { compatible = "inside-secure,safexcel-eip197"; reg = <0x800000 0x200000>; - interrupts = , - , - , - , - , - ; + interrupts = <87 IRQ_TYPE_LEVEL_HIGH>, + <88 IRQ_TYPE_LEVEL_HIGH>, + <89 IRQ_TYPE_LEVEL_HIGH>, + <90 IRQ_TYPE_LEVEL_HIGH>, + <91 IRQ_TYPE_LEVEL_HIGH>, + <92 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", "eip"; clock-names = "core", "reg"; @@ -430,8 +434,8 @@ /* non-prefetchable memory */ 0x82000000 0 CP110_PCIEx_MEM_BASE(0) 0 CP110_PCIEx_MEM_BASE(0) 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &CP110_LABEL(icu) ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &CP110_LABEL(icu_nsr) 22 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; num-lanes = <1>; clock-names = "core", "reg"; clocks = <&CP110_LABEL(clk) 1 13>, <&CP110_LABEL(clk) 1 14>; @@ -457,8 +461,8 @@ /* non-prefetchable memory */ 0x82000000 0 CP110_PCIEx_MEM_BASE(1) 0 CP110_PCIEx_MEM_BASE(1) 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &CP110_LABEL(icu) ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &CP110_LABEL(icu_nsr) 24 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; num-lanes = <1>; clock-names = "core", "reg"; @@ -485,8 +489,8 @@ /* non-prefetchable memory */ 0x82000000 0 CP110_PCIEx_MEM_BASE(2) 0 CP110_PCIEx_MEM_BASE(2) 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &CP110_LABEL(icu) ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &CP110_LABEL(icu_nsr) 23 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH>; num-lanes = <1>; clock-names = "core", "reg";