@@ -21,12 +21,43 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rtc 1>;
+ clock-names = "ext_clock";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* WL-PMU-EN: PL2 */
+ };
};
&ehci0 {
status = "okay";
};
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <®_dcdc1>;
+ /*
+ * Schematic shows both dldo4 and eldo1 connected for vcc-io-wifi, but
+ * dldo4 connection shows DNP(Do Not Populate) and eldo1 connected with
+ * 0Ohm register to vcc-io-wifi so eldo1 is used.
+ */
+ vqmmc-supply = <®_eldo1>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* WL-WAKE-AP: PL3 */
+ interrupt-names = "host-wake";
+ };
+};
+
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
Enable AP6330 WiFi/BT combo chip on Amarula A64-Relic board: - WiFi SDIO interface is connected to MMC1 - WiFi WL-PMU-EN pin connected to gpio PL2: attach to mmc-pwrseq - WiFi WL-WAKE-AP pin connected to gpio PL3 - 32kHz external oscillator gate clock from RTC Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- Changes for v3: - move dtsi change in separate patch Changes for v2: - Move external rtc clock nodes into main rtc node definition of sun50i-a64.dtsi .../dts/allwinner/sun50i-a64-amarula-relic.dts | 31 ++++++++++++++++++++++ 1 file changed, 31 insertions(+)