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Thu, 07 Jun 2018 13:49:46 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:0:1000:1501:38e4:86fe:ec0c:4007]) by smtp.gmail.com with ESMTPSA id g80-v6sm35758452pfd.21.2018.06.07.13.49.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 Jun 2018 13:49:45 -0700 (PDT) From: Douglas Anderson To: andy.gross@linaro.org Subject: [PATCH 2/2] arm64: dts: qcom: sdm845: Enable debug UART and I2C10 on sdm845-mtp Date: Thu, 7 Jun 2018 13:46:08 -0700 Message-Id: <20180607204608.27688-2-dianders@chromium.org> X-Mailer: git-send-email 2.17.1.1185.g55be947832-goog In-Reply-To: <20180607204608.27688-1-dianders@chromium.org> References: <20180607204608.27688-1-dianders@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180607_134957_169414_91366832 X-CRM114-Status: GOOD ( 12.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org, Will Deacon , Douglas Anderson , swboyd@chromium.org, David Brown , Rob Herring , kramasub@codeaurora.org, linux-arm-kernel@lists.infradead.org, Catalin Marinas , bjorn.andersson@linaro.org, linux-soc@vger.kernel.org, sdharia@codeaurora.org, linux-kernel@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The debug UART is very useful to have. I2C10 is enabled as an example of a I2C port we can talk on for now. Eventually we'll want to put peripherals under it. Signed-off-by: Douglas Anderson Reviewed-by: Bjorn Andersson Tested-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 52 +++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index 979ab49913f1..e1eda143a725 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -12,4 +12,56 @@ / { model = "Qualcomm Technologies, Inc. SDM845 MTP"; compatible = "qcom,sdm845-mtp"; + + aliases { + serial0 = &uart9; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&i2c10 { + status = "okay"; + clock-frequency = <400000>; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&uart9 { + status = "okay"; +}; + +/* PINCTRL - additions to nodes defined in sdm845.dtsi */ + +&qup_i2c10_default { + pinconf { + pins = "gpio55", "gpio56"; + drive-strength = <2>; + bias-disable; + }; +}; + +&qup_uart9_default { + pinconf-tx { + pins = "gpio4"; + drive-strength = <2>; + bias-disable; + }; + + pinconf-rx { + pins = "gpio5"; + drive-strength = <2>; + bias-pull-up; + }; +}; + +&qup_uart9_sleep { + pinconf { + pins = "gpio4", "gpio5"; + bias-pull-down; + }; };