From patchwork Tue Jun 12 20:00:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Jernej_=C5=A0krabec?= X-Patchwork-Id: 10461161 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7E8536020F for ; Tue, 12 Jun 2018 20:19:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 662C328BA8 for ; Tue, 12 Jun 2018 20:19:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5A32E28BAB; Tue, 12 Jun 2018 20:19:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D8CA928BA8 for ; Tue, 12 Jun 2018 20:19:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=IJycs39ajCUgUZ9xxoZAIW+0lrIjjdOz+YTG0kBb0YA=; b=Kj7eFtMfq6ZJAOQv1OJa8cL130 c8yW9WbloBxn5RlArQOsbhN77UXRXIKMnyEcj5VvAZa/5gYzwbx8SeSHqGombsR8f468iKSZINbmW B6svOj0c7Rxn23iz/HagDj7qfs5T646MoPg1IG9F+OCk5T4rLvU5YW9+IKJUeKHsAaqeaX78qNaYu 715GzFLJ5JAr0w9ZyPUC7KO7lQ7Vcp4a5cmX+1ZCjGnkBnlOXIgxtAIB2D6f7552iuJhzBfyj6odT 4zA32lEFiOF04QY6oJSNp6Ve5jde3f4G/dgIAWkCqBMb77i2cAHaef37JXW2fZ/l/3qEDnbS6Z/O2 QWxDf1HQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fSpkt-0003op-0H; Tue, 12 Jun 2018 20:19:03 +0000 Received: from mailoutvs61.siol.net ([185.57.226.252] helo=mail.siol.net) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fSpVT-0006wP-K9 for linux-arm-kernel@lists.infradead.org; Tue, 12 Jun 2018 20:04:07 +0000 Received: from localhost (localhost [127.0.0.1]) by mail.siol.net (Zimbra) with ESMTP id 52AF252212F; Tue, 12 Jun 2018 22:02:55 +0200 (CEST) X-Virus-Scanned: amavisd-new at psrvmta12.zcs-production.pri Received: from mail.siol.net ([127.0.0.1]) by localhost (psrvmta12.zcs-production.pri [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id Iv9gcXFdLQfR; Tue, 12 Jun 2018 22:02:54 +0200 (CEST) Received: from mail.siol.net (localhost [127.0.0.1]) by mail.siol.net (Zimbra) with ESMTPS id 6CD8D521279; Tue, 12 Jun 2018 22:02:54 +0200 (CEST) Received: from localhost.localdomain (unknown [194.152.15.144]) (Authenticated sender: 031275009) by mail.siol.net (Zimbra) with ESMTPSA id E041D5212DC; Tue, 12 Jun 2018 22:02:51 +0200 (CEST) From: Jernej Skrabec To: maxime.ripard@bootlin.com, wens@csie.org, robh+dt@kernel.org Subject: [PATCH v2 26/27] ARM: dts: sun8i: r40: Add HDMI pipeline Date: Tue, 12 Jun 2018 22:00:35 +0200 Message-Id: <20180612200036.21483-27-jernej.skrabec@siol.net> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180612200036.21483-1-jernej.skrabec@siol.net> References: <20180612200036.21483-1-jernej.skrabec@siol.net> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180612_130308_016382_FB95BFB3 X-CRM114-Status: UNSURE ( 9.87 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, airlied@linux.ie, gustavo@padovan.org, maarten.lankhorst@linux.intel.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com, seanpaul@chromium.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add all entries needed for HDMI to function properly. Since R40 has highly configurable pipeline, both mixers and both TCON TVs are added. Board specific DT should then connect them together trough TCON TOP muxers to best fit the purpose of the board. Signed-off-by: Jernej Skrabec --- arch/arm/boot/dts/sun8i-r40.dtsi | 257 +++++++++++++++++++++++++++++++ 1 file changed, 257 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 173dcc1652d2..17171c82457e 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -42,8 +42,11 @@ */ #include +#include #include +#include #include +#include / { #address-cells = <1>; @@ -99,12 +102,76 @@ }; }; + de: display-engine { + compatible = "allwinner,sun8i-r40-display-engine", + "allwinner,sun8i-h3-display-engine"; + allwinner,pipelines = <&mixer0>, <&mixer1>; + status = "disabled"; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; + display_clocks: clock@1000000 { + compatible = "allwinner,sun8i-r40-de2-clk", + "allwinner,sun8i-h3-de2-clk"; + reg = <0x01000000 0x100000>; + clocks = <&ccu CLK_DE>, + <&ccu CLK_BUS_DE>; + clock-names = "mod", + "bus"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + mixer0: mixer@1100000 { + compatible = "allwinner,sun8i-r40-de2-mixer-0"; + reg = <0x01100000 0x100000>; + clocks = <&display_clocks CLK_BUS_MIXER0>, + <&display_clocks CLK_MIXER0>; + clock-names = "bus", + "mod"; + resets = <&display_clocks RST_MIXER0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mixer0_out: port@1 { + reg = <1>; + mixer0_out_tcon_top: endpoint { + remote-endpoint = <&tcon_top_mixer0_in_mixer0>; + }; + }; + }; + }; + + mixer1: mixer@1200000 { + compatible = "allwinner,sun8i-r40-de2-mixer-1"; + reg = <0x01200000 0x100000>; + clocks = <&display_clocks CLK_BUS_MIXER1>, + <&display_clocks CLK_MIXER1>; + clock-names = "bus", + "mod"; + resets = <&display_clocks RST_WB>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mixer1_out: port@1 { + reg = <1>; + mixer1_out_tcon_top: endpoint { + remote-endpoint = <&tcon_top_mixer1_in_mixer1>; + }; + }; + }; + }; + nmi_intc: interrupt-controller@1c00030 { compatible = "allwinner,sun7i-a20-sc-nmi"; interrupt-controller; @@ -451,6 +518,151 @@ #size-cells = <0>; }; + tcon_top: tcon-top@1c70000 { + compatible = "allwinner,sun8i-r40-tcon-top"; + reg = <0x01c70000 0x1000>; + clocks = <&ccu CLK_BUS_TCON_TOP>; + clock-names = "bus"; + resets = <&ccu RST_BUS_TCON_TOP>; + reset-names = "rst"; + #clock-cells = <1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon_top_mixer0_in: port@0 { + reg = <0>; + + tcon_top_mixer0_in_mixer0: endpoint { + remote-endpoint = <&mixer0_out_tcon_top>; + }; + }; + + tcon_top_mixer0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + tcon_top_mixer0_out_tcon_lcd0: endpoint@0 { + reg = <0>; + }; + + tcon_top_mixer0_out_tcon_lcd1: endpoint@1 { + reg = <1>; + }; + + tcon_top_mixer0_out_tcon_tv0: endpoint@2 { + reg = <2>; + }; + + tcon_top_mixer0_out_tcon_tv1: endpoint@3 { + reg = <3>; + }; + }; + + tcon_top_mixer1_in: port@2 { + reg = <2>; + + tcon_top_mixer1_in_mixer1: endpoint { + remote-endpoint = <&mixer1_out_tcon_top>; + }; + }; + + tcon_top_mixer1_out: port@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + + tcon_top_mixer1_out_tcon_lcd0: endpoint@0 { + reg = <0>; + }; + + tcon_top_mixer1_out_tcon_lcd1: endpoint@1 { + reg = <1>; + }; + + tcon_top_mixer1_out_tcon_tv0: endpoint@2 { + reg = <2>; + }; + + tcon_top_mixer1_out_tcon_tv1: endpoint@3 { + reg = <3>; + }; + }; + + tcon_top_hdmi_in: port@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + + tcon_top_hdmi_in_tcon_tv0: endpoint@0 { + reg = <0>; + }; + + tcon_top_hdmi_in_tcon_tv1: endpoint@1 { + reg = <1>; + }; + }; + + tcon_top_hdmi_out: port@5 { + reg = <5>; + + tcon_top_hdmi_out_hdmi: endpoint { + remote-endpoint = <&hdmi_in_tcon_top>; + }; + }; + }; + }; + + tcon_tv0: lcd-controller@1c73000 { + compatible = "allwinner,sun8i-r40-tcon-tv"; + reg = <0x01c73000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_TCON_TV0>, <&ccu CLK_TCON_TV0>, + <&tcon_top 1>; + clock-names = "ahb", "tcon-ch1", "tcon-top"; + resets = <&ccu RST_BUS_TCON_TV0>; + reset-names = "lcd"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon_tv0_in: port@0 { + reg = <0>; + }; + + tcon_tv0_out: port@1 { + reg = <1>; + }; + }; + }; + + tcon_tv1: lcd-controller@1c74000 { + compatible = "allwinner,sun8i-r40-tcon-tv"; + reg = <0x01c74000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_TCON_TV1>, <&ccu CLK_TCON_TV1>, + <&tcon_top 2>; + clock-names = "ahb", "tcon-ch1", "tcon-top"; + resets = <&ccu RST_BUS_TCON_TV1>; + reset-names = "lcd"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon_tv1_in: port@0 { + reg = <0>; + }; + + tcon_tv1_out: port@1 { + reg = <1>; + }; + }; + }; + gic: interrupt-controller@1c81000 { compatible = "arm,gic-400"; reg = <0x01c81000 0x1000>, @@ -461,6 +673,51 @@ #interrupt-cells = <3>; interrupts = ; }; + + hdmi: hdmi@1ee0000 { + compatible = "allwinner,sun8i-r40-dw-hdmi", + "allwinner,sun8i-a83t-dw-hdmi"; + reg = <0x01ee0000 0x10000>; + reg-io-width = <1>; + interrupts = ; + clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>, + <&ccu CLK_HDMI>; + clock-names = "iahb", "isfr", "tmds"; + resets = <&ccu RST_BUS_HDMI1>; + reset-names = "ctrl"; + phys = <&hdmi_phy>; + phy-names = "hdmi-phy"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + hdmi_in: port@0 { + reg = <0>; + + hdmi_in_tcon_top: endpoint { + remote-endpoint = <&tcon_top_hdmi_out_hdmi>; + }; + }; + + hdmi_out: port@1 { + reg = <1>; + }; + }; + }; + + hdmi_phy: hdmi-phy@1ef0000 { + compatible = "allwinner,sun8i-r40-hdmi-phy", + "allwinner,sun50i-a64-hdmi-phy"; + reg = <0x01ef0000 0x10000>; + clocks = <&ccu CLK_BUS_HDMI1>, <&ccu CLK_HDMI_SLOW>, + <&ccu 7>, <&ccu 16>; + clock-names = "bus", "mod", "pll-0", "pll-1"; + resets = <&ccu RST_BUS_HDMI0>; + reset-names = "phy"; + #phy-cells = <0>; + }; }; timer {