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[109.252.91.84]) by smtp.gmail.com with ESMTPSA id m84-v6sm3118543lje.91.2018.06.19.04.02.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Jun 2018 04:02:55 -0700 (PDT) From: Dmitry Osipenko To: Russell King , Thierry Reding , Jonathan Hunter Subject: [PATCH v2 3/5] ARM: tegra: Setup L2 cache using Trusted Foundations firmware Date: Tue, 19 Jun 2018 14:00:25 +0300 Message-Id: <20180619110027.16935-4-digetx@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180619110027.16935-1-digetx@gmail.com> References: <20180619110027.16935-1-digetx@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180619_040306_790745_60DC5408 X-CRM114-Status: GOOD ( 12.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, Peter Geis , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, =?UTF-8?q?Micha=C5=82=20Miros=C5=82aw?= MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP On Tegra20/30 L2 cache must be initialized using firmware call if CPU is running in insecure mode. Initialize L2 cache and setup the outer-cache callbacks in early boot using the firmware API. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/tegra.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index f9587be48235..590b1cf1a8c4 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -38,6 +38,7 @@ #include #include +#include #include #include #include @@ -70,9 +71,23 @@ u32 tegra_uart_config[3] = { 0, }; +static void __init tegra_trusted_foundations_l2x0_cache_init(void) +{ + if (IS_ENABLED(CONFIG_CACHE_L2X0) && + IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && + of_machine_is_compatible("nvidia,tegra20")) + call_firmware_op(l2x0_init); + + if (IS_ENABLED(CONFIG_CACHE_L2X0) && + IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && + of_machine_is_compatible("nvidia,tegra30")) + call_firmware_op(l2x0_init); +} + static void __init tegra_init_early(void) { of_register_trusted_foundations(); + tegra_trusted_foundations_l2x0_cache_init(); tegra_cpu_reset_handler_init(); }