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Fri, 22 Jun 2018 10:02:01 -0700 (PDT) Subject: [PATCH 4/5] openrisc: Use the new GENERIC_IRQ_MULTI_HANDLER Date: Fri, 22 Jun 2018 10:01:25 -0700 Message-Id: <20180622170126.6308-5-palmer@sifive.com> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20180622170126.6308-1-palmer@sifive.com> References: <20180621181756.12493-1-palmer@sifive.com> <20180622170126.6308-1-palmer@sifive.com> From: Palmer Dabbelt To: tglx@linutronix.de X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180622_100212_824551_BD453AA5 X-CRM114-Status: GOOD ( 13.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nicolas.pitre@linaro.org, mark.rutland@arm.com, alexandre.belloni@bootlin.com, catalin.marinas@arm.com, Palmer Dabbelt , Will Deacon , yamada.masahiro@socionext.com, keescook@chromium.org, jonas@southpole.se, linux@armlinux.org.uk, jhogan@kernel.org, vladimir.murzin@arm.com, jason@lakedaemon.net, Arnd Bergmann , marc.zyngier@arm.com, stefan.kristiansson@saunalahti.fi, jinb.park7@gmail.com, openrisc@lists.librecores.org, shorne@gmail.com, linux-arm-kernel@lists.infradead.org, ard.biesheuvel@linaro.org, Greg KH , linux-kernel@vger.kernel.org, james.morse@arm.com, pombredanne@nexb.com, kstewart@linuxfoundation.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP It appears that openrisc copied arm64's GENERIC_IRQ_MULTI_HANDLER code (which came from arm). I wanted to make this generic so I could use it in the RISC-V port. This patch converts the openrisc code to use the generic version. Acked-by: Stafford Horne Signed-off-by: Palmer Dabbelt --- arch/openrisc/Kconfig | 5 +---- arch/openrisc/include/asm/irq.h | 2 -- arch/openrisc/kernel/irq.c | 7 ------- 3 files changed, 1 insertion(+), 13 deletions(-) diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig index 9ecad05bfc73..dfb6a79ba7ff 100644 --- a/arch/openrisc/Kconfig +++ b/arch/openrisc/Kconfig @@ -27,7 +27,6 @@ config OPENRISC select GENERIC_STRNLEN_USER select GENERIC_SMP_IDLE_THREAD select MODULES_USE_ELF_RELA - select MULTI_IRQ_HANDLER select HAVE_DEBUG_STACKOVERFLOW select OR1K_PIC select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1 @@ -36,6 +35,7 @@ config OPENRISC select ARCH_USE_QUEUED_RWLOCKS select OMPIC if SMP select ARCH_WANT_FRAME_POINTERS + select GENERIC_IRQ_MULTI_HANDLER config CPU_BIG_ENDIAN def_bool y @@ -69,9 +69,6 @@ config STACKTRACE_SUPPORT config LOCKDEP_SUPPORT def_bool y -config MULTI_IRQ_HANDLER - def_bool y - source "init/Kconfig" source "kernel/Kconfig.freezer" diff --git a/arch/openrisc/include/asm/irq.h b/arch/openrisc/include/asm/irq.h index d9eee0a2b7b4..eb612b1865d2 100644 --- a/arch/openrisc/include/asm/irq.h +++ b/arch/openrisc/include/asm/irq.h @@ -24,6 +24,4 @@ #define NO_IRQ (-1) -extern void set_handle_irq(void (*handle_irq)(struct pt_regs *)); - #endif /* __ASM_OPENRISC_IRQ_H__ */ diff --git a/arch/openrisc/kernel/irq.c b/arch/openrisc/kernel/irq.c index 35e478a93116..5f9445effaf8 100644 --- a/arch/openrisc/kernel/irq.c +++ b/arch/openrisc/kernel/irq.c @@ -41,13 +41,6 @@ void __init init_IRQ(void) irqchip_init(); } -static void (*handle_arch_irq)(struct pt_regs *); - -void __init set_handle_irq(void (*handle_irq)(struct pt_regs *)) -{ - handle_arch_irq = handle_irq; -} - void __irq_entry do_IRQ(struct pt_regs *regs) { handle_arch_irq(regs);