From patchwork Tue Jun 26 16:58:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jae Hyun Yoo X-Patchwork-Id: 10489581 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E78E760386 for ; Tue, 26 Jun 2018 16:58:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D46B0285CC for ; Tue, 26 Jun 2018 16:58:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C8CEC2863B; Tue, 26 Jun 2018 16:58:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F37F1285CC for ; Tue, 26 Jun 2018 16:58:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=KhCTRa7Wiri1mT2QW3s3njn77kw9HVdub9MvprMO23E=; b=HrQ Hzx9b1fcd4PkcHxfYtNqMFunJvtYCucAci6XGqxL1v1N6HVvO5t5taRa2dCrbiDURTNkViFwwLUg1 8QzRBK4xbAQamXoqJ8Q2OLBv3TVSChj1CF4oiq+1kA+jU53dTJrmjDY3rLkz6md2iyG6ub00f/L4u 9ibK8ALqsBHMV0KgTUP8zpOMFQXQCbS0ObqkyyMrIH9IDpATc2jEn8lV6kAWbBl8mg6MuGrVwBCzr mwk6trPGMrYERrR6t7ld0E2p/o3I7neSaYCtLx/SfqmfXGCSbTP15WPDKfKF7KW26sNvG7bqnjT/n NVZSRQJWd0sHPU1n9sCnXW6D5vslX6w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fXrIm-0006m7-TH; Tue, 26 Jun 2018 16:58:48 +0000 Received: from mga18.intel.com ([134.134.136.126]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fXrIi-0006kz-8r for linux-arm-kernel@lists.infradead.org; Tue, 26 Jun 2018 16:58:46 +0000 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Jun 2018 09:58:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.51,275,1526367600"; d="scan'208,146"; a="62358955" Received: from maru.jf.intel.com ([10.54.51.80]) by orsmga003.jf.intel.com with ESMTP; 26 Jun 2018 09:58:32 -0700 From: Jae Hyun Yoo To: Brendan Higgins , Benjamin Herrenschmidt , Joel Stanley , Andrew Jeffery , linux-i2c@vger.kernel.org, openbmc@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH] i2c: aspeed: Improve driver to support multi-master use cases stably Date: Tue, 26 Jun 2018 09:58:12 -0700 Message-Id: <20180626165812.4141-1-jae.hyun.yoo@linux.intel.com> X-Mailer: git-send-email 2.17.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180626_095844_397338_2A29699F X-CRM114-Status: GOOD ( 27.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vernon Mauery , Jae Hyun Yoo , James Feist MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP BMC firmware should support some multi-master use cases such as multi-node, IPMB, BMC-ME link and so on but the current ASPEED I2C driver is a bit unstable for the multi-master use case. So this patch improves ASPEED I2C driver to support the multi-master use case stably. Changes: * Added XFER_MODE status register checking logic into aspeed_i2c_master_xfer to improve the current bus busy checking logic. * Changed the order of enum aspeed_i2c_master_state and enum aspeed_i2c_slave_state defines to make their initial values set to ASPEED_I2C_MASTER_INACTIVE and ASPEED_I2C_SLAVE_STOP respectively. In case of multi-master use with previous code, if a slave data comes ahead of the first master xfer, master_state starts from an invalid state. This change fixed the issue. * Adjusted spin_lock scope to make it wrap the whole irq handler using a single lock and unlock pair covers both master and slave handlers. * Added irq_status variable as a member of the struct aspeed_i2c_bus to collect handled interrupt bits throughout the master and the slave irq handlers. * Added control logic to put an order on calling the master and the slave irq handlers based on their current states. Signed-off-by: Jae Hyun Yoo --- drivers/i2c/busses/i2c-aspeed.c | 200 +++++++++++++++++++------------- 1 file changed, 118 insertions(+), 82 deletions(-) diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c index 60e4d0e939a3..ac3e17d9a365 100644 --- a/drivers/i2c/busses/i2c-aspeed.c +++ b/drivers/i2c/busses/i2c-aspeed.c @@ -4,6 +4,7 @@ * Copyright (C) 2012-2017 ASPEED Technology Inc. * Copyright 2017 IBM Corporation * Copyright 2017 Google, Inc. + * Copyright (c) 2018 Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -12,6 +13,7 @@ #include #include +#include #include #include #include @@ -82,6 +84,11 @@ #define ASPEED_I2CD_INTR_RX_DONE BIT(2) #define ASPEED_I2CD_INTR_TX_NAK BIT(1) #define ASPEED_I2CD_INTR_TX_ACK BIT(0) +#define ASPEED_I2CD_INTR_ERRORS \ + (ASPEED_I2CD_INTR_SDA_DL_TIMEOUT | \ + ASPEED_I2CD_INTR_SCL_TIMEOUT | \ + ASPEED_I2CD_INTR_ABNORMAL | \ + ASPEED_I2CD_INTR_ARBIT_LOSS) #define ASPEED_I2CD_INTR_ALL \ (ASPEED_I2CD_INTR_SDA_DL_TIMEOUT | \ ASPEED_I2CD_INTR_BUS_RECOVER_DONE | \ @@ -94,6 +101,7 @@ ASPEED_I2CD_INTR_TX_ACK) /* 0x14 : I2CD Command/Status Register */ +#define ASPEED_I2CD_XFER_MODE_STS_MASK GENMASK(22, 19) #define ASPEED_I2CD_SCL_LINE_STS BIT(18) #define ASPEED_I2CD_SDA_LINE_STS BIT(17) #define ASPEED_I2CD_BUS_BUSY_STS BIT(16) @@ -110,23 +118,27 @@ /* 0x18 : I2CD Slave Device Address Register */ #define ASPEED_I2CD_DEV_ADDR_MASK GENMASK(6, 0) +/* Timeout for bus busy checking */ +#define BUS_BUSY_CHECK_TIMEOUT 250000 /* 250ms */ +#define BUS_BUSY_CHECK_INTERVAL 10000 /* 10ms */ + enum aspeed_i2c_master_state { + ASPEED_I2C_MASTER_INACTIVE, ASPEED_I2C_MASTER_START, ASPEED_I2C_MASTER_TX_FIRST, ASPEED_I2C_MASTER_TX, ASPEED_I2C_MASTER_RX_FIRST, ASPEED_I2C_MASTER_RX, ASPEED_I2C_MASTER_STOP, - ASPEED_I2C_MASTER_INACTIVE, }; enum aspeed_i2c_slave_state { + ASPEED_I2C_SLAVE_STOP, ASPEED_I2C_SLAVE_START, ASPEED_I2C_SLAVE_READ_REQUESTED, ASPEED_I2C_SLAVE_READ_PROCESSED, ASPEED_I2C_SLAVE_WRITE_REQUESTED, ASPEED_I2C_SLAVE_WRITE_RECEIVED, - ASPEED_I2C_SLAVE_STOP, }; struct aspeed_i2c_bus { @@ -150,6 +162,7 @@ struct aspeed_i2c_bus { int cmd_err; /* Protected only by i2c_lock_bus */ int master_xfer_result; + u32 irq_status; #if IS_ENABLED(CONFIG_I2C_SLAVE) struct i2c_client *slave; enum aspeed_i2c_slave_state slave_state; @@ -229,37 +242,30 @@ static int aspeed_i2c_recover_bus(struct aspeed_i2c_bus *bus) #if IS_ENABLED(CONFIG_I2C_SLAVE) static bool aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus) { - u32 command, irq_status, status_ack = 0; + u32 command, status_ack = 0; struct i2c_client *slave = bus->slave; - bool irq_handled = true; u8 value; - spin_lock(&bus->lock); - if (!slave) { - irq_handled = false; - goto out; - } + if (!slave) + return false; command = readl(bus->base + ASPEED_I2C_CMD_REG); - irq_status = readl(bus->base + ASPEED_I2C_INTR_STS_REG); /* Slave was requested, restart state machine. */ - if (irq_status & ASPEED_I2CD_INTR_SLAVE_MATCH) { + if (bus->irq_status & ASPEED_I2CD_INTR_SLAVE_MATCH) { status_ack |= ASPEED_I2CD_INTR_SLAVE_MATCH; bus->slave_state = ASPEED_I2C_SLAVE_START; } /* Slave is not currently active, irq was for someone else. */ - if (bus->slave_state == ASPEED_I2C_SLAVE_STOP) { - irq_handled = false; - goto out; - } + if (bus->slave_state == ASPEED_I2C_SLAVE_STOP) + return false; dev_dbg(bus->dev, "slave irq status 0x%08x, cmd 0x%08x\n", - irq_status, command); + bus->irq_status, command); /* Slave was sent something. */ - if (irq_status & ASPEED_I2CD_INTR_RX_DONE) { + if (bus->irq_status & ASPEED_I2CD_INTR_RX_DONE) { value = readl(bus->base + ASPEED_I2C_BYTE_BUF_REG) >> 8; /* Handle address frame. */ if (bus->slave_state == ASPEED_I2C_SLAVE_START) { @@ -274,28 +280,29 @@ static bool aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus) } /* Slave was asked to stop. */ - if (irq_status & ASPEED_I2CD_INTR_NORMAL_STOP) { + if (bus->irq_status & ASPEED_I2CD_INTR_NORMAL_STOP) { status_ack |= ASPEED_I2CD_INTR_NORMAL_STOP; bus->slave_state = ASPEED_I2C_SLAVE_STOP; } - if (irq_status & ASPEED_I2CD_INTR_TX_NAK) { + if (bus->irq_status & ASPEED_I2CD_INTR_TX_NAK) { status_ack |= ASPEED_I2CD_INTR_TX_NAK; bus->slave_state = ASPEED_I2C_SLAVE_STOP; } + if (bus->irq_status & ASPEED_I2CD_INTR_TX_ACK) { + status_ack |= ASPEED_I2CD_INTR_TX_ACK; + } switch (bus->slave_state) { case ASPEED_I2C_SLAVE_READ_REQUESTED: - if (irq_status & ASPEED_I2CD_INTR_TX_ACK) + if (bus->irq_status & ASPEED_I2CD_INTR_TX_ACK) dev_err(bus->dev, "Unexpected ACK on read request.\n"); bus->slave_state = ASPEED_I2C_SLAVE_READ_PROCESSED; - i2c_slave_event(slave, I2C_SLAVE_READ_REQUESTED, &value); writel(value, bus->base + ASPEED_I2C_BYTE_BUF_REG); writel(ASPEED_I2CD_S_TX_CMD, bus->base + ASPEED_I2C_CMD_REG); break; case ASPEED_I2C_SLAVE_READ_PROCESSED: - status_ack |= ASPEED_I2CD_INTR_TX_ACK; - if (!(irq_status & ASPEED_I2CD_INTR_TX_ACK)) + if (!(bus->irq_status & ASPEED_I2CD_INTR_TX_ACK)) dev_err(bus->dev, "Expected ACK after processed read.\n"); i2c_slave_event(slave, I2C_SLAVE_READ_PROCESSED, &value); @@ -318,15 +325,8 @@ static bool aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus) break; } - if (status_ack != irq_status) - dev_err(bus->dev, - "irq handled != irq. expected %x, but was %x\n", - irq_status, status_ack); - writel(status_ack, bus->base + ASPEED_I2C_INTR_STS_REG); - -out: - spin_unlock(&bus->lock); - return irq_handled; + bus->irq_status ^= status_ack; + return !bus->irq_status; } #endif /* CONFIG_I2C_SLAVE */ @@ -384,20 +384,19 @@ static int aspeed_i2c_is_irq_error(u32 irq_status) static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus) { - u32 irq_status, status_ack = 0, command = 0; + u32 status_ack = 0, command = 0; struct i2c_msg *msg; u8 recv_byte; int ret; - spin_lock(&bus->lock); - irq_status = readl(bus->base + ASPEED_I2C_INTR_STS_REG); - /* Ack all interrupt bits. */ - writel(irq_status, bus->base + ASPEED_I2C_INTR_STS_REG); - - if (irq_status & ASPEED_I2CD_INTR_BUS_RECOVER_DONE) { + if (bus->irq_status & ASPEED_I2CD_INTR_BUS_RECOVER_DONE) { bus->master_state = ASPEED_I2C_MASTER_INACTIVE; status_ack |= ASPEED_I2CD_INTR_BUS_RECOVER_DONE; goto out_complete; + } else { + /* Master is not currently active, irq was for someone else. */ + if (bus->master_state == ASPEED_I2C_MASTER_INACTIVE) + goto out_no_complete; } /* @@ -405,20 +404,23 @@ static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus) * should clear the command queue effectively taking us back to the * INACTIVE state. */ - ret = aspeed_i2c_is_irq_error(irq_status); - if (ret < 0) { - dev_dbg(bus->dev, "received error interrupt: 0x%08x", - irq_status); + ret = aspeed_i2c_is_irq_error(bus->irq_status); + if (ret) { + dev_dbg(bus->dev, "received error interrupt: 0x%08x\n", + bus->irq_status); bus->cmd_err = ret; bus->master_state = ASPEED_I2C_MASTER_INACTIVE; + status_ack |= (bus->irq_status & ASPEED_I2CD_INTR_ERRORS); goto out_complete; } /* We are in an invalid state; reset bus to a known state. */ if (!bus->msgs) { - dev_err(bus->dev, "bus in unknown state"); + dev_err(bus->dev, "bus in unknown state irq_status: 0x%x\n", + bus->irq_status); bus->cmd_err = -EIO; - if (bus->master_state != ASPEED_I2C_MASTER_STOP) + if (bus->master_state != ASPEED_I2C_MASTER_STOP && + bus->master_state != ASPEED_I2C_MASTER_INACTIVE) aspeed_i2c_do_stop(bus); goto out_no_complete; } @@ -430,7 +432,13 @@ static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus) * then update the state and handle the new state below. */ if (bus->master_state == ASPEED_I2C_MASTER_START) { - if (unlikely(!(irq_status & ASPEED_I2CD_INTR_TX_ACK))) { + if (unlikely(!(bus->irq_status & ASPEED_I2CD_INTR_TX_ACK))) { + if (unlikely(!(bus->irq_status & + ASPEED_I2CD_INTR_TX_NAK))) { + bus->cmd_err = -ENXIO; + bus->master_state = ASPEED_I2C_MASTER_INACTIVE; + goto out_complete; + } pr_devel("no slave present at %02x", msg->addr); status_ack |= ASPEED_I2CD_INTR_TX_NAK; bus->cmd_err = -ENXIO; @@ -450,12 +458,13 @@ static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus) switch (bus->master_state) { case ASPEED_I2C_MASTER_TX: - if (unlikely(irq_status & ASPEED_I2CD_INTR_TX_NAK)) { - dev_dbg(bus->dev, "slave NACKed TX"); + if (unlikely(bus->irq_status & ASPEED_I2CD_INTR_TX_NAK)) { + dev_dbg(bus->dev, "slave NACKed TX\n"); status_ack |= ASPEED_I2CD_INTR_TX_NAK; goto error_and_stop; - } else if (unlikely(!(irq_status & ASPEED_I2CD_INTR_TX_ACK))) { - dev_err(bus->dev, "slave failed to ACK TX"); + } else if (unlikely(!(bus->irq_status & + ASPEED_I2CD_INTR_TX_ACK))) { + dev_err(bus->dev, "slave failed to ACK TX\n"); goto error_and_stop; } status_ack |= ASPEED_I2CD_INTR_TX_ACK; @@ -473,12 +482,12 @@ static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus) goto out_no_complete; case ASPEED_I2C_MASTER_RX_FIRST: /* RX may not have completed yet (only address cycle) */ - if (!(irq_status & ASPEED_I2CD_INTR_RX_DONE)) + if (!(bus->irq_status & ASPEED_I2CD_INTR_RX_DONE)) goto out_no_complete; /* fallthrough intended */ case ASPEED_I2C_MASTER_RX: - if (unlikely(!(irq_status & ASPEED_I2CD_INTR_RX_DONE))) { - dev_err(bus->dev, "master failed to RX"); + if (unlikely(!(bus->irq_status & ASPEED_I2CD_INTR_RX_DONE))) { + dev_err(bus->dev, "master failed to RX\n"); goto error_and_stop; } status_ack |= ASPEED_I2CD_INTR_RX_DONE; @@ -508,8 +517,11 @@ static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus) } goto out_no_complete; case ASPEED_I2C_MASTER_STOP: - if (unlikely(!(irq_status & ASPEED_I2CD_INTR_NORMAL_STOP))) { - dev_err(bus->dev, "master failed to STOP"); + if (unlikely(!(bus->irq_status & + ASPEED_I2CD_INTR_NORMAL_STOP))) { + dev_err(bus->dev, + "master failed to STOP irq_status:0x%x\n", + bus->irq_status); bus->cmd_err = -EIO; /* Do not STOP as we have already tried. */ } else { @@ -520,8 +532,8 @@ static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus) goto out_complete; case ASPEED_I2C_MASTER_INACTIVE: dev_err(bus->dev, - "master received interrupt 0x%08x, but is inactive", - irq_status); + "master received interrupt 0x%08x, but is inactive\n", + bus->irq_status); bus->cmd_err = -EIO; /* Do not STOP as we should be inactive. */ goto out_complete; @@ -543,26 +555,61 @@ static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus) bus->master_xfer_result = bus->msgs_index + 1; complete(&bus->cmd_complete); out_no_complete: - if (irq_status != status_ack) - dev_err(bus->dev, - "irq handled != irq. expected 0x%08x, but was 0x%08x\n", - irq_status, status_ack); - spin_unlock(&bus->lock); - return !!irq_status; + bus->irq_status ^= status_ack; + return !bus->irq_status; } static irqreturn_t aspeed_i2c_bus_irq(int irq, void *dev_id) { struct aspeed_i2c_bus *bus = dev_id; + u32 irq_received; + + spin_lock(&bus->lock); + irq_received = readl(bus->base + ASPEED_I2C_INTR_STS_REG); + bus->irq_status = irq_received; #if IS_ENABLED(CONFIG_I2C_SLAVE) - if (aspeed_i2c_slave_irq(bus)) { - dev_dbg(bus->dev, "irq handled by slave.\n"); - return IRQ_HANDLED; + if (bus->master_state != ASPEED_I2C_MASTER_INACTIVE) { + if (!aspeed_i2c_master_irq(bus)) + aspeed_i2c_slave_irq(bus); + } else { + if (!aspeed_i2c_slave_irq(bus)) + aspeed_i2c_master_irq(bus); } +#else + aspeed_i2c_master_irq(bus); #endif /* CONFIG_I2C_SLAVE */ - return aspeed_i2c_master_irq(bus) ? IRQ_HANDLED : IRQ_NONE; + if (bus->irq_status) + dev_err(bus->dev, + "irq handled != irq. expected 0x%08x, but was 0x%08x\n", + irq_received, irq_received ^ bus->irq_status); + + /* Ack all interrupt bits. */ + writel(irq_received, bus->base + ASPEED_I2C_INTR_STS_REG); + spin_unlock(&bus->lock); + return bus->irq_status ? IRQ_NONE : IRQ_HANDLED; +} + +static int aspeed_i2c_check_bus_busy_timeout(struct aspeed_i2c_bus *bus) +{ + ktime_t timeout = ktime_add_us(ktime_get(), BUS_BUSY_CHECK_TIMEOUT); + + might_sleep(); + + for (;;) { + if (!(readl(bus->base + ASPEED_I2C_CMD_REG) & + (ASPEED_I2CD_BUS_BUSY_STS | + ASPEED_I2CD_XFER_MODE_STS_MASK))) + return 0; + if (ktime_compare(ktime_get(), timeout) > 0) + break; + usleep_range((BUS_BUSY_CHECK_INTERVAL >> 2) + 1, + BUS_BUSY_CHECK_INTERVAL); + } + + dev_err(bus->dev, "timeout waiting for idle. attempting recovery\n"); + return aspeed_i2c_recover_bus(bus); } static int aspeed_i2c_master_xfer(struct i2c_adapter *adap, @@ -570,22 +617,11 @@ static int aspeed_i2c_master_xfer(struct i2c_adapter *adap, { struct aspeed_i2c_bus *bus = i2c_get_adapdata(adap); unsigned long time_left, flags; - int ret = 0; - - spin_lock_irqsave(&bus->lock, flags); - bus->cmd_err = 0; - /* If bus is busy, attempt recovery. We assume a single master - * environment. - */ - if (readl(bus->base + ASPEED_I2C_CMD_REG) & ASPEED_I2CD_BUS_BUSY_STS) { - spin_unlock_irqrestore(&bus->lock, flags); - ret = aspeed_i2c_recover_bus(bus); - if (ret) - return ret; - spin_lock_irqsave(&bus->lock, flags); - } + if (aspeed_i2c_check_bus_busy_timeout(bus)) + return -EAGAIN; + spin_lock_irqsave(&bus->lock, flags); bus->cmd_err = 0; bus->msgs = msgs; bus->msgs_index = 0; @@ -851,7 +887,7 @@ static int aspeed_i2c_probe_bus(struct platform_device *pdev) bus->rst = devm_reset_control_get_shared(&pdev->dev, NULL); if (IS_ERR(bus->rst)) { dev_err(&pdev->dev, - "missing or invalid reset controller device tree entry"); + "missing or invalid reset controller device tree entry\n"); return PTR_ERR(bus->rst); } reset_control_deassert(bus->rst);