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[93.181.165.181]) by smtp.gmail.com with ESMTPSA id h7-v6sm826584ljk.27.2018.07.18.16.56.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 18 Jul 2018 16:56:53 -0700 (PDT) From: Janusz Krzysztofik To: Boris Brezillon , Miquel Raynal Subject: [RFC PATCH 3/8] mtd: rawnand: ams-delta: Set port direction once per transfer Date: Thu, 19 Jul 2018 01:57:05 +0200 Message-Id: <20180718235710.18242-4-jmkrzyszt@gmail.com> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20180718235710.18242-1-jmkrzyszt@gmail.com> References: <20180718235710.18242-1-jmkrzyszt@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180718_165706_149697_9B43A9BE X-CRM114-Status: GOOD ( 14.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Grygorii Strashko , Kevin Hilman , Tony Lindgren , Richard Weinberger , Linus Walleij , Aaro Koskinen , Artem Bityutskiy , linux-kernel@vger.kernel.org, Marek Vasut , linux-omap@vger.kernel.org, Janusz Krzysztofik , linux-mtd@lists.infradead.org, linux-gpio@vger.kernel.org, Santosh Shilimkar , Brian Norris , David Woodhouse , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP In its current shape, the driver sets data port direction before each byte read/write operation, even during multi-byte transfers. Optimize that by setting the port direction only on first byte of each transfer. Signed-off-by: Janusz Krzysztofik --- drivers/mtd/nand/raw/ams-delta.c | 42 ++++++++++++++++++++++++++++++---------- 1 file changed, 32 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/nand/raw/ams-delta.c b/drivers/mtd/nand/raw/ams-delta.c index 6ac38e9cfa1a..dfefcd79b420 100644 --- a/drivers/mtd/nand/raw/ams-delta.c +++ b/drivers/mtd/nand/raw/ams-delta.c @@ -72,50 +72,72 @@ static const struct mtd_partition partition_info[] = { .size = 3 * SZ_256K }, }; -static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte) +static void ams_delta_write_next_byte(struct mtd_info *mtd, u_char byte) { struct nand_chip *this = mtd_to_nand(mtd); struct ams_delta_nand *priv = nand_get_controller_data(this); - void __iomem *io_base = priv->io_base; - writew(0, io_base + OMAP_MPUIO_IO_CNTL); writew(byte, this->IO_ADDR_W); gpiod_set_value(priv->gpiod_nwe, 0); ndelay(40); gpiod_set_value(priv->gpiod_nwe, 1); } -static u_char ams_delta_read_byte(struct mtd_info *mtd) +static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte) { - u_char res; struct nand_chip *this = mtd_to_nand(mtd); struct ams_delta_nand *priv = nand_get_controller_data(this); void __iomem *io_base = priv->io_base; + writew(0, io_base + OMAP_MPUIO_IO_CNTL); + + ams_delta_write_next_byte(mtd, byte); +} + +static u_char ams_delta_read_next_byte(struct mtd_info *mtd) +{ + struct nand_chip *this = mtd_to_nand(mtd); + struct ams_delta_nand *priv = nand_get_controller_data(this); + u_char res; + gpiod_set_value(priv->gpiod_nre, 0); ndelay(40); - writew(~0, io_base + OMAP_MPUIO_IO_CNTL); res = readw(this->IO_ADDR_R); gpiod_set_value(priv->gpiod_nre, 1); return res; } +static u_char ams_delta_read_byte(struct mtd_info *mtd) +{ + struct nand_chip *this = mtd_to_nand(mtd); + struct ams_delta_nand *priv = nand_get_controller_data(this); + void __iomem *io_base = priv->io_base; + + writew(~0, io_base + OMAP_MPUIO_IO_CNTL); + + return ams_delta_read_next_byte(mtd); +} + static void ams_delta_write_buf(struct mtd_info *mtd, const u_char *buf, int len) { int i; - for (i=0; i 0) + ams_delta_write_byte(mtd, buf[0]); + for (i = 1; i < len; i++) + ams_delta_write_next_byte(mtd, buf[i]); } static void ams_delta_read_buf(struct mtd_info *mtd, u_char *buf, int len) { int i; - for (i=0; i 0) + buf[0] = ams_delta_read_byte(mtd); + for (i = 1; i < len; i++) + buf[i] = ams_delta_read_next_byte(mtd); } /*