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[93.181.165.181]) by smtp.gmail.com with ESMTPSA id h7-v6sm826584ljk.27.2018.07.18.16.56.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 18 Jul 2018 16:56:59 -0700 (PDT) From: Janusz Krzysztofik To: Boris Brezillon , Miquel Raynal Subject: [RFC PATCH 7/8] mtd: rawnand: ams-delta: Check sanity of data GPIO resource Date: Thu, 19 Jul 2018 01:57:09 +0200 Message-Id: <20180718235710.18242-8-jmkrzyszt@gmail.com> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20180718235710.18242-1-jmkrzyszt@gmail.com> References: <20180718235710.18242-1-jmkrzyszt@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180718_165712_576297_CE1C76F9 X-CRM114-Status: GOOD ( 19.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Grygorii Strashko , Kevin Hilman , Tony Lindgren , Richard Weinberger , Linus Walleij , Aaro Koskinen , Artem Bityutskiy , linux-kernel@vger.kernel.org, Marek Vasut , linux-omap@vger.kernel.org, Janusz Krzysztofik , linux-mtd@lists.infradead.org, linux-gpio@vger.kernel.org, Santosh Shilimkar , Brian Norris , David Woodhouse , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The plan is to replace data port readw()/writew() operations with GPIO callbacks provided by gpio-omap driver. For acceptable performance the GPIO chip must support get/set_multiple() GPIO callbacks. In order to avoid data corruption, we require the array of data GPIO descriptors obtained with gpiod_get_array() to meet some strict requirements: - all pins must belong to the same single GPIO chip, - array index of each pin descriptor must match its hardware number, - pin polarity must not be inverted, - pin hardware configuration must not be open drain nor open source. Let's implement the above described sanity checks before replacing the readw()/writew() operations witn GPIO callbacks. If a check fails, return -EINVAL to indicate the board provided GPIO setup is invalid. Signed-off-by: Janusz Krzysztofik --- drivers/mtd/nand/raw/ams-delta.c | 87 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 86 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/raw/ams-delta.c b/drivers/mtd/nand/raw/ams-delta.c index ad62c0245458..bd501f385e78 100644 --- a/drivers/mtd/nand/raw/ams-delta.c +++ b/drivers/mtd/nand/raw/ams-delta.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -190,7 +191,9 @@ static int ams_delta_init(struct platform_device *pdev) struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); void __iomem *io_base; struct gpio_descs *data_gpiods; - int err = 0; + struct gpio_chip *data_gpioc; + unsigned long mask, bits; + int i, err = 0; if (!res) return -ENXIO; @@ -298,6 +301,88 @@ static int ams_delta_init(struct platform_device *pdev) goto out_mtd; } + /* Use GPIO chip of first data GPIO pin descriptor */ + data_gpioc = gpiod_to_chip(data_gpiods->desc[0]); + + /* + * For acceptable performance require the data GPIO + * chip to support get/set_multiple() callbacks. + */ + if (!data_gpioc->get_multiple || !data_gpioc->set_multiple) { + err = -EINVAL; + dev_err(&pdev->dev, + "data GPIO chip does not support get/set_multiple()\n"); + goto out_mtd; + } + + /* Verify if get_multiple() returns all pins low as initialized above */ + mask = (1 << data_gpiods->ndescs) - 1; + err = data_gpioc->get_multiple(data_gpioc, &mask, &bits); + if (err) { + dev_err(&pdev->dev, + "data GPIO chip get_multiple() failed: %d\n", err); + goto out_mtd; + } + if (bits) { + err = -EINVAL; + dev_err(&pdev->dev, + "mismmatch of data GPIO initial value: %lu\n", bits); + goto out_mtd; + } + + /* Verify each data GPIO pin */ + for (i = 0; i < data_gpiods->ndescs; i++) { + /* Require all pins belong to the same GPIO chip */ + if (gpiod_to_chip(data_gpiods->desc[i]) != data_gpioc) { + err = -EINVAL; + dev_err(&pdev->dev, "GPIO chip mismatch of data bit %d\n", + i); + goto out_mtd; + } + + /* Require all pins active high (not inverted) */ + if (gpiod_is_active_low(data_gpiods->desc[i])) { + err = -EINVAL; + dev_err(&pdev->dev, + "unsupported polarity of data GPIO bit %d\n", + i); + goto out_mtd; + } + + /* + * Require pin gpiod array index to match hardware pin number. + * Verified by setting the pin high with gpiod_set_raw_value() + * then reading it back with gpiochip->get() for comparison. + */ + gpiod_set_raw_value(data_gpiods->desc[i], 1); + err = data_gpioc->get(data_gpioc, i); + if (err < 0) { + dev_err(&pdev->dev, + "data bit %d GPIO chip get() failed: %d\n", i, + err); + goto out_mtd; + } + if (!err) { + err = -EINVAL; + dev_err(&pdev->dev, "mismatch of data GPIO bit %d value\n", + i); + goto out_mtd; + } + + /* + * Check for unsupported pin hardware configuration. Use + * just verified gpiod array index as hardware pin number. + */ + if (gpiochip_line_is_open_drain(data_gpioc, i) || + gpiochip_line_is_open_source(data_gpioc, i)) { + err = -EINVAL; + dev_err(&pdev->dev, + "unsupported mode of data GPIO bit %d\n", + i); + goto out_mtd; + } + } + /* Scan to find existence of the device */ err = nand_scan(mtd, 1); if (err)