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[2003:dc:d732:6200:55ba:2447:d3f4:3559]) by smtp.googlemail.com with ESMTPSA id g15-v6sm6030541wrh.48.2018.07.21.10.37.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 21 Jul 2018 10:37:34 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, khilman@baylibre.com, carlo@caione.org Subject: [PATCH 1/3] ARM: meson: select HAVE_ARM_TWD when SMP support is enabled Date: Sat, 21 Jul 2018 19:37:19 +0200 Message-Id: <20180721173721.31361-2-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180721173721.31361-1-martin.blumenstingl@googlemail.com> References: <20180721173721.31361-1-martin.blumenstingl@googlemail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180721_103746_471276_C47E082A X-CRM114-Status: GOOD ( 10.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The 32-bit Meson SoCs come with a per-core Cortex-A9 (Meson8 and Meson8m2) or Cortex-A5 (Meson8b) "Timer-Watchdog (aka TWD), which provides both a per-cpu local timer and watchdog". Selecting HAVE_ARM_TWD allows adding a "arm,cortex-a5-twd-timer" or "arm,cortex-a9-twd-timer" compatible timer to the SoC's .dts. Signed-off-by: Martin Blumenstingl --- arch/arm/mach-meson/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index d51cfda953d4..27ae58f87406 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -10,6 +10,7 @@ menuconfig ARCH_MESON select COMMON_CLK select COMMON_CLK_AMLOGIC select HAVE_ARM_SCU if SMP + select HAVE_ARM_TWD if SMP if ARCH_MESON