From patchwork Fri Sep 7 06:24:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrea Merello X-Patchwork-Id: 10591711 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A4D955A4 for ; Fri, 7 Sep 2018 06:26:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 928592AD93 for ; Fri, 7 Sep 2018 06:26:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 86CCB2ADE4; Fri, 7 Sep 2018 06:26:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 019982AE02 for ; Fri, 7 Sep 2018 06:26:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=cxYo4KZZpHvneZxNJnzC8DnNVatpMgMxZP1Y6c2XinU=; b=KZVHkuFgFtb5t8/XZ7m9oVCSBv ZsA5yJTtXWysqkJJpo4QCXMVck12iwh6gckyGw5UGgpk/ItbWTQJMW8wCIQg6gD5PF5vOGXI9gxqE sjjuQ/MIDad1sJVwLw14qKenXO7xx4M1tlIJYNacT0Ko4G/sa5qVFc555MHN+jBrAyaf4gw5hxQic xZOLon5H9T2476lCDN7JonbqYIu1GzR8dW1scfwlHLwUMuc58wKhK064eOvcZXJ2MUl18CMboiYCy 4I9W9i8qwadAPN104ntGo9FbiQ8GOe3VMqhHCguUAUMftkyNPCJNll6JFCduMV4QDWKiXtoKM5QG2 MHAtm27Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fyADo-0002xE-Vt; Fri, 07 Sep 2018 06:26:25 +0000 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fyACy-00026g-0q for linux-arm-kernel@lists.infradead.org; Fri, 07 Sep 2018 06:25:35 +0000 Received: by mail-wr1-x441.google.com with SMTP id v17-v6so13698105wrr.9 for ; Thu, 06 Sep 2018 23:25:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=G0d4E4UUBGUZ+uqudEZiIppK0s4vLLe5noMqkvJPkuU=; b=Pgh9G8deVvztHjVCwyJuRM0Ll6p/RwKoE5lKIPkqaSYFJe7qQ2sasOolra9ymO+Z+2 T9QWgs+2b9wumUqRt/bfnO+lNtf4ITFhaP1yo0RuugFQRpf7WBNO8+YdZ8/gV6XnveGN bnMmAHFYUiM2+jLgrvIsjpm2bdh110HQSJJq5Z1SAq+gw/gItdo3WGKxzCio39lLss0y rfUDac+tuLoBzYNruVTM9MzpXPETZKg7qC6peESB6mVJ8QnEzXxh7VdS5thpZJQsHOEA W3CCBKtZ3Oa8iP26tYaZt3w1rRY+Sb7b4ylMWCpXE1GLlyDIoD7QAzsbE3D29/OhR+f6 Q7rA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=G0d4E4UUBGUZ+uqudEZiIppK0s4vLLe5noMqkvJPkuU=; b=ariaa7zETrIRNBsGvfZ0mNeapcLi8YQTPwso3FEbcRRLPv824avRa0sMlj0ujSURe6 Zdmspoi3uLFOqvf8E+RECtLmnUuGvF+HSBwBKwwKsa8al2HFhRbOLQs4eKKbEtcXwDzI iKGheBYaWlUsD+tWtSznTmyCII+aWu+nq4AXHT2q0nEPArqo5XZD/maABGgW7YrWKtey Ew5rWB0j3xB5dmR+0kkYLP+ausS2IkSFHEb3baPuXkmtRfOyrviaqJncVInqfDiiWT+x 6cUvOpsL7OrVixcGJ7A3MQFXRBTQAWtA1NYfmqQp3XwptjpykUGtqFIaPuibywjEn8Jl 3Yeg== X-Gm-Message-State: APzg51ARpCcHpfXJwcXICVEtg2sP2VpmIGNpEw1WwUNXMjRL5HI6nO2Z ZYX7bc1tWKQo+mypIM+S4fM= X-Google-Smtp-Source: ANB0VdbHcQABVeP+3wDtH9ye0milPJ4WQpEcq3N4Md1LnllLiKvm4bV3NzGKaau9GlVQnbp7CC/6Rw== X-Received: by 2002:adf:93c2:: with SMTP id 60-v6mr4495773wrp.81.1536301520318; Thu, 06 Sep 2018 23:25:20 -0700 (PDT) Received: from NewMoon.iit.local ([90.147.180.254]) by smtp.gmail.com with ESMTPSA id w10-v6sm8387233wrp.31.2018.09.06.23.25.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Sep 2018 23:25:19 -0700 (PDT) From: Andrea Merello To: vkoul@kernel.org, dan.j.williams@intel.com, michal.simek@xilinx.com, appana.durga.rao@xilinx.com, dmaengine@vger.kernel.org Subject: [PATCH v5 2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors Date: Fri, 7 Sep 2018 08:24:57 +0200 Message-Id: <20180907062502.8241-2-andrea.merello@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180907062502.8241-1-andrea.merello@gmail.com> References: <20180907062502.8241-1-andrea.merello@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180906_232532_114716_3A37B9BA X-CRM114-Status: GOOD ( 18.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, Andrea Merello , radhey.shyam.pandey@xilinx.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Whenever a single or cyclic transaction is prepared, the driver could eventually split it over several SG descriptors in order to deal with the HW maximum transfer length. This could end up in DMA operations starting from a misaligned address. This seems fatal for the HW if DRE (Data Realignment Engine) is not enabled. This patch eventually adjusts the transfer size in order to make sure all operations start from an aligned address. Cc: Radhey Shyam Pandey Signed-off-by: Andrea Merello Reviewed-by: Radhey Shyam Pandey --- Changes in v2: - don't introduce copy_mask field, rather rely on already-esistent copy_align field. Suggested by Radhey Shyam Pandey - reword title Changes in v3: - fix bug introduced in v2: wrong copy size when DRE is enabled - use implementation suggested by Radhey Shyam Pandey Changes in v4: - rework on the top of 1/6 Changes in v5: - fix typo in commit title - add hint about "DRE" meaning in commit message --- drivers/dma/xilinx/xilinx_dma.c | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c index a3aaa0e34cc7..aaa6de8a70e4 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -954,15 +954,28 @@ static int xilinx_dma_alloc_chan_resources(struct dma_chan *dchan) /** * xilinx_dma_calc_copysize - Calculate the amount of data to copy + * @chan: Driver specific DMA channel * @size: Total data that needs to be copied * @done: Amount of data that has been already copied * * Return: Amount of data that has to be copied */ -static int xilinx_dma_calc_copysize(int size, int done) +static int xilinx_dma_calc_copysize(struct xilinx_dma_chan *chan, + int size, int done) { - return min_t(size_t, size - done, + size_t copy = min_t(size_t, size - done, XILINX_DMA_MAX_TRANS_LEN); + + if ((copy + done < size) && + chan->xdev->common.copy_align) { + /* + * If this is not the last descriptor, make sure + * the next one will be properly aligned + */ + copy = rounddown(copy, + (1 << chan->xdev->common.copy_align)); + } + return copy; } /** @@ -1804,7 +1817,7 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_slave_sg( * Calculate the maximum number of bytes to transfer, * making sure it is less than the hw limit */ - copy = xilinx_dma_calc_copysize(sg_dma_len(sg), + copy = xilinx_dma_calc_copysize(chan, sg_dma_len(sg), sg_used); hw = &segment->hw; @@ -1909,7 +1922,8 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_dma_cyclic( * Calculate the maximum number of bytes to transfer, * making sure it is less than the hw limit */ - copy = xilinx_dma_calc_copysize(period_len, sg_used); + copy = xilinx_dma_calc_copysize(chan, + period_len, sg_used); hw = &segment->hw; xilinx_axidma_buf(chan, hw, buf_addr, sg_used, period_len * i);