From patchwork Wed Sep 12 08:59:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Horia Geanta X-Patchwork-Id: 10597135 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E03D514E5 for ; Wed, 12 Sep 2018 09:01:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CF0E629A42 for ; Wed, 12 Sep 2018 09:01:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C1E7729A67; Wed, 12 Sep 2018 09:01:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E6BFA29A42 for ; Wed, 12 Sep 2018 09:01:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ls8i04jvSqEDWvBYaKe3x/hNp/FxVoxQZZGjCM1x30U=; b=tliYBcCvx4LG9b 5k2FrbXMbw+0E1U3ePhM8g0aSBDujhzUKS3xHyClus9LOeSM6nsqSSyWBCdEhc4YaDj2o/ws6xYhS bnoIrw4BIKBJkblChzBB8Kyq9iUKqaqtnK/OJxqi+u1K/LRGM2QarMtS34BculqR6qEjes+d4rwvb RF08stYcJb+Q/ROsVhXxsZsdpNQqio0mRX4Q/IIp/2KJqaiFqmCqsEIn42d9Xyx1O9HO1RZgrPXWu Vvumk66GJBF9FloaF8CYu4aSFXTcG1boZziOTjjov3Si08h4aX3W0/BCfn+pQQTUw7HdP918cmVJy KdYieaVieSmXmozLGXNQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g011M-00063D-5X; Wed, 12 Sep 2018 09:01:12 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1g010I-00045T-VX for linux-arm-kernel@lists.infradead.org; Wed, 12 Sep 2018 09:00:16 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 671461A0113; Wed, 12 Sep 2018 10:59:55 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 5620F1A0102; Wed, 12 Sep 2018 10:59:55 +0200 (CEST) Received: from enigma.ea.freescale.net (enigma.ea.freescale.net [10.171.81.110]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id CC758205F0; Wed, 12 Sep 2018 10:59:54 +0200 (CEST) From: =?utf-8?q?Horia_Geant=C4=83?= To: Herbert Xu , Stuart Yoder , Laurentiu Tudor , Li Yang , Roy Pledge , Catalin Marinas , Will Deacon Subject: [PATCH v2 03/12] soc: fsl: dpio: add frame list format support Date: Wed, 12 Sep 2018 11:59:28 +0300 Message-Id: <20180912085937.22489-4-horia.geanta@nxp.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180912085937.22489-1-horia.geanta@nxp.com> References: <20180912085937.22489-1-horia.geanta@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180912_020007_321706_AEECDF5D X-CRM114-Status: GOOD ( 11.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, Aymen Sghaier , "David S . Miller" , linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for dpaa2_fd_list format, i.e. dpaa2_fl_entry structure and accessors. Frame list entries (FLEs) are similar, but not identical to FDs: + "F" (final) bit - FMT[b'01] is reserved - DD, SC, DROPP bits (covered by "FD compatibility" field in FLE case) - FLC[5:0] not used for stashing Signed-off-by: Horia Geantă Acked-by: Li Yang --- include/soc/fsl/dpaa2-fd.h | 242 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 242 insertions(+) diff --git a/include/soc/fsl/dpaa2-fd.h b/include/soc/fsl/dpaa2-fd.h index 2576abaa7779..90ae8d191f1a 100644 --- a/include/soc/fsl/dpaa2-fd.h +++ b/include/soc/fsl/dpaa2-fd.h @@ -66,6 +66,15 @@ struct dpaa2_fd { #define SG_BPID_MASK 0x3FFF #define SG_FINAL_FLAG_MASK 0x1 #define SG_FINAL_FLAG_SHIFT 15 +#define FL_SHORT_LEN_FLAG_MASK 0x1 +#define FL_SHORT_LEN_FLAG_SHIFT 14 +#define FL_SHORT_LEN_MASK 0x3FFFF +#define FL_OFFSET_MASK 0x0FFF +#define FL_FORMAT_MASK 0x3 +#define FL_FORMAT_SHIFT 12 +#define FL_BPID_MASK 0x3FFF +#define FL_FINAL_FLAG_MASK 0x1 +#define FL_FINAL_FLAG_SHIFT 15 /* Error bits in FD CTRL */ #define FD_CTRL_ERR_MASK 0x000000FF @@ -435,4 +444,237 @@ static inline void dpaa2_sg_set_final(struct dpaa2_sg_entry *sg, bool final) sg->format_offset |= cpu_to_le16(final << SG_FINAL_FLAG_SHIFT); } +/** + * struct dpaa2_fl_entry - structure for frame list entry. + * @addr: address in the FLE + * @len: length in the FLE + * @bpid: buffer pool ID + * @format_offset: format, offset, and short-length fields + * @frc: frame context + * @ctrl: control bits...including pta, pvt1, pvt2, err, etc + * @flc: flow context address + */ +struct dpaa2_fl_entry { + __le64 addr; + __le32 len; + __le16 bpid; + __le16 format_offset; + __le32 frc; + __le32 ctrl; + __le64 flc; +}; + +enum dpaa2_fl_format { + dpaa2_fl_single = 0, + dpaa2_fl_res, + dpaa2_fl_sg +}; + +/** + * dpaa2_fl_get_addr() - get the addr field of FLE + * @fle: the given frame list entry + * + * Return the address in the frame list entry. + */ +static inline dma_addr_t dpaa2_fl_get_addr(const struct dpaa2_fl_entry *fle) +{ + return (dma_addr_t)le64_to_cpu(fle->addr); +} + +/** + * dpaa2_fl_set_addr() - Set the addr field of FLE + * @fle: the given frame list entry + * @addr: the address needs to be set in frame list entry + */ +static inline void dpaa2_fl_set_addr(struct dpaa2_fl_entry *fle, + dma_addr_t addr) +{ + fle->addr = cpu_to_le64(addr); +} + +/** + * dpaa2_fl_get_frc() - Get the frame context in the FLE + * @fle: the given frame list entry + * + * Return the frame context field in the frame lsit entry. + */ +static inline u32 dpaa2_fl_get_frc(const struct dpaa2_fl_entry *fle) +{ + return le32_to_cpu(fle->frc); +} + +/** + * dpaa2_fl_set_frc() - Set the frame context in the FLE + * @fle: the given frame list entry + * @frc: the frame context needs to be set in frame list entry + */ +static inline void dpaa2_fl_set_frc(struct dpaa2_fl_entry *fle, u32 frc) +{ + fle->frc = cpu_to_le32(frc); +} + +/** + * dpaa2_fl_get_ctrl() - Get the control bits in the FLE + * @fle: the given frame list entry + * + * Return the control bits field in the frame list entry. + */ +static inline u32 dpaa2_fl_get_ctrl(const struct dpaa2_fl_entry *fle) +{ + return le32_to_cpu(fle->ctrl); +} + +/** + * dpaa2_fl_set_ctrl() - Set the control bits in the FLE + * @fle: the given frame list entry + * @ctrl: the control bits to be set in the frame list entry + */ +static inline void dpaa2_fl_set_ctrl(struct dpaa2_fl_entry *fle, u32 ctrl) +{ + fle->ctrl = cpu_to_le32(ctrl); +} + +/** + * dpaa2_fl_get_flc() - Get the flow context in the FLE + * @fle: the given frame list entry + * + * Return the flow context in the frame list entry. + */ +static inline dma_addr_t dpaa2_fl_get_flc(const struct dpaa2_fl_entry *fle) +{ + return (dma_addr_t)le64_to_cpu(fle->flc); +} + +/** + * dpaa2_fl_set_flc() - Set the flow context field of FLE + * @fle: the given frame list entry + * @flc_addr: the flow context needs to be set in frame list entry + */ +static inline void dpaa2_fl_set_flc(struct dpaa2_fl_entry *fle, + dma_addr_t flc_addr) +{ + fle->flc = cpu_to_le64(flc_addr); +} + +static inline bool dpaa2_fl_short_len(const struct dpaa2_fl_entry *fle) +{ + return !!((le16_to_cpu(fle->format_offset) >> + FL_SHORT_LEN_FLAG_SHIFT) & FL_SHORT_LEN_FLAG_MASK); +} + +/** + * dpaa2_fl_get_len() - Get the length in the FLE + * @fle: the given frame list entry + * + * Return the length field in the frame list entry. + */ +static inline u32 dpaa2_fl_get_len(const struct dpaa2_fl_entry *fle) +{ + if (dpaa2_fl_short_len(fle)) + return le32_to_cpu(fle->len) & FL_SHORT_LEN_MASK; + + return le32_to_cpu(fle->len); +} + +/** + * dpaa2_fl_set_len() - Set the length field of FLE + * @fle: the given frame list entry + * @len: the length needs to be set in frame list entry + */ +static inline void dpaa2_fl_set_len(struct dpaa2_fl_entry *fle, u32 len) +{ + fle->len = cpu_to_le32(len); +} + +/** + * dpaa2_fl_get_offset() - Get the offset field in the frame list entry + * @fle: the given frame list entry + * + * Return the offset. + */ +static inline u16 dpaa2_fl_get_offset(const struct dpaa2_fl_entry *fle) +{ + return le16_to_cpu(fle->format_offset) & FL_OFFSET_MASK; +} + +/** + * dpaa2_fl_set_offset() - Set the offset field of FLE + * @fle: the given frame list entry + * @offset: the offset needs to be set in frame list entry + */ +static inline void dpaa2_fl_set_offset(struct dpaa2_fl_entry *fle, u16 offset) +{ + fle->format_offset &= cpu_to_le16(~FL_OFFSET_MASK); + fle->format_offset |= cpu_to_le16(offset); +} + +/** + * dpaa2_fl_get_format() - Get the format field in the FLE + * @fle: the given frame list entry + * + * Return the format. + */ +static inline enum dpaa2_fl_format dpaa2_fl_get_format(const struct dpaa2_fl_entry *fle) +{ + return (enum dpaa2_fl_format)((le16_to_cpu(fle->format_offset) >> + FL_FORMAT_SHIFT) & FL_FORMAT_MASK); +} + +/** + * dpaa2_fl_set_format() - Set the format field of FLE + * @fle: the given frame list entry + * @format: the format needs to be set in frame list entry + */ +static inline void dpaa2_fl_set_format(struct dpaa2_fl_entry *fle, + enum dpaa2_fl_format format) +{ + fle->format_offset &= cpu_to_le16(~(FL_FORMAT_MASK << FL_FORMAT_SHIFT)); + fle->format_offset |= cpu_to_le16(format << FL_FORMAT_SHIFT); +} + +/** + * dpaa2_fl_get_bpid() - Get the bpid field in the FLE + * @fle: the given frame list entry + * + * Return the buffer pool id. + */ +static inline u16 dpaa2_fl_get_bpid(const struct dpaa2_fl_entry *fle) +{ + return le16_to_cpu(fle->bpid) & FL_BPID_MASK; +} + +/** + * dpaa2_fl_set_bpid() - Set the bpid field of FLE + * @fle: the given frame list entry + * @bpid: buffer pool id to be set + */ +static inline void dpaa2_fl_set_bpid(struct dpaa2_fl_entry *fle, u16 bpid) +{ + fle->bpid &= cpu_to_le16(~(FL_BPID_MASK)); + fle->bpid |= cpu_to_le16(bpid); +} + +/** + * dpaa2_fl_is_final() - Check final bit in FLE + * @fle: the given frame list entry + * + * Return bool. + */ +static inline bool dpaa2_fl_is_final(const struct dpaa2_fl_entry *fle) +{ + return !!(le16_to_cpu(fle->format_offset) >> FL_FINAL_FLAG_SHIFT); +} + +/** + * dpaa2_fl_set_final() - Set the final bit in FLE + * @fle: the given frame list entry + * @final: the final boolean to be set + */ +static inline void dpaa2_fl_set_final(struct dpaa2_fl_entry *fle, bool final) +{ + fle->format_offset &= cpu_to_le16((~(FL_FINAL_FLAG_MASK << + FL_FINAL_FLAG_SHIFT)) & 0xFFFF); + fle->format_offset |= cpu_to_le16(final << FL_FINAL_FLAG_SHIFT); +} + #endif /* __FSL_DPAA2_FD_H */