| Message ID | 20180919123613.15092-17-laurentiu.tudor@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | SMMU enablement for NXP LS1043A and LS1046A | expand |
On 19/09/18 13:36, laurentiu.tudor@nxp.com wrote: > From: Laurentiu Tudor <laurentiu.tudor@nxp.com> > > This allows for the SMMU device to be probed by the SMMU kernel driver. > > Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> > --- > .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 42 +++++++++++++++++++ > 1 file changed, 42 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > index ef83786b8b90..06863d3e4a7d 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > @@ -228,6 +228,48 @@ > bus-width = <4>; > }; > > + mmu: iommu@9000000 { > + compatible = "arm,mmu-500"; > + reg = <0 0x9000000 0 0x400000>; > + dma-coherent; > + #global-interrupts = <2>; > + #iommu-cells = <1>; > + interrupts = <0 142 4>, /* global secure fault */ Either that's not really the secure global interrupt, or those context interrupts are wrong. Robin. > + <0 143 4>, /* combined secure interrupt */ > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>, > + <0 142 4>; > + }; > + > scfg: scfg@1570000 { > compatible = "fsl,ls1046a-scfg", "syscon"; > reg = <0x0 0x1570000 0x0 0x10000>; >
Hi Robin, On 19.09.2018 16:30, Robin Murphy wrote: > On 19/09/18 13:36, laurentiu.tudor@nxp.com wrote: >> From: Laurentiu Tudor <laurentiu.tudor@nxp.com> >> >> This allows for the SMMU device to be probed by the SMMU kernel driver. >> >> Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> >> --- >> .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 42 +++++++++++++++++++ >> 1 file changed, 42 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi >> b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi >> index ef83786b8b90..06863d3e4a7d 100644 >> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi >> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi >> @@ -228,6 +228,48 @@ >> bus-width = <4>; >> }; >> + mmu: iommu@9000000 { >> + compatible = "arm,mmu-500"; >> + reg = <0 0x9000000 0 0x400000>; >> + dma-coherent; >> + #global-interrupts = <2>; >> + #iommu-cells = <1>; >> + interrupts = <0 142 4>, /* global secure fault */ > > Either that's not really the secure global interrupt, or those context > interrupts are wrong. Now that you pointing out, I realize that the comments don't make much sense. Actually, 142 is the non-secure interrupt (all ints are ORed on this IRQ) while 143 is the secure version. I'll update the comments in the next re-spin. --- Thanks & Best Regards, Laurentiu > >> + <0 143 4>, /* combined secure interrupt */ >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>, >> + <0 142 4>; >> + }; >> + >> scfg: scfg@1570000 { >> compatible = "fsl,ls1046a-scfg", "syscon"; >> reg = <0x0 0x1570000 0x0 0x10000>; >>
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index ef83786b8b90..06863d3e4a7d 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -228,6 +228,48 @@ bus-width = <4>; }; + mmu: iommu@9000000 { + compatible = "arm,mmu-500"; + reg = <0 0x9000000 0 0x400000>; + dma-coherent; + #global-interrupts = <2>; + #iommu-cells = <1>; + interrupts = <0 142 4>, /* global secure fault */ + <0 143 4>, /* combined secure interrupt */ + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>, + <0 142 4>; + }; + scfg: scfg@1570000 { compatible = "fsl,ls1046a-scfg", "syscon"; reg = <0x0 0x1570000 0x0 0x10000>;