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Wed, 10 Oct 2018 19:09:51 +0200 (CEST) From: Lubomir Rintel To: Mark Brown , Geert Uytterhoeven Subject: [PATCH v2 01/11] dt-bindings: spi/spi-pxa2xx: add PXA2xx SSP SPI Controller Date: Wed, 10 Oct 2018 19:09:26 +0200 Message-Id: <20181010170936.316862-2-lkundrak@v3.sk> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20181010170936.316862-1-lkundrak@v3.sk> References: <20181010170936.316862-1-lkundrak@v3.sk> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181010_181021_631987_89820ACE X-CRM114-Status: GOOD ( 13.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Eric Miao , James Cameron , linux-kernel@vger.kernel.org, Haojian Zhuang , linux-spi@vger.kernel.org, Lubomir Rintel , Rob Herring , linux-arm-kernel@lists.infradead.org, Robert Jarzmik , Daniel Mack Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This is the SPI controller found on Marvel MMP2 and perhaps more platforms. Reviewed-by: Rob Herring Signed-off-by: Lubomir Rintel Acked-by: Pavel Machek --- Changes since v1: - s/ssp@d4035000/spi@d4035000/ .../devicetree/bindings/spi/spi-pxa2xx.txt | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-pxa2xx.txt diff --git a/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt b/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt new file mode 100644 index 000000000000..0335a9bd2e8a --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt @@ -0,0 +1,24 @@ +PXA2xx SSP SPI Controller + +Required properties: +- compatible: Must be "marvell,mmp2-ssp". +- reg: Offset and length of the device's register set. +- interrupts: Should be the interrupt number. +- clocks: Should contain a single entry describing the clock input. +- #address-cells: Number of cells required to define a chip select address. +- #size-cells: Should be zero. + +Optional properties: +- cs-gpios: list of GPIO chip selects. See the SPI bus bindings, + Documentation/devicetree/bindings/spi/spi-bus.txt + +Child nodes represent devices on the SPI bus + See ../spi/spi-bus.txt + +Example: + ssp1: spi@d4035000 { + compatible = "marvell,mmp2-ssp"; + reg = <0xd4035000 0x1000>; + clocks = <&soc_clocks MMP2_CLK_SSP0>; + interrupts = <0>; + };