| Message ID | 20181031044742.26327-1-andy.tang@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: nxp: ls208xa: add more thermal zone support | expand |
Hi, PING. BR, Andy > -----Original Message----- > From: Yuantian Tang <andy.tang@nxp.com> > Sent: 2018年10月31日 12:48 > To: shawnguo@kernel.org > Cc: Leo Li <leoyang.li@nxp.com>; robh+dt@kernel.org; mark.rutland@arm.com; > linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; > linux-kernel@vger.kernel.org; rui.zhang@intel.com; daniel.lezcano@linaro.org; > Andy Tang <andy.tang@nxp.com> > Subject: [PATCH] arm64: dts: nxp: ls208xa: add more thermal zone support > > Ls208xa has several thermal sensors. Add all the sensor id to dts to enable > them. > > To make the dts cleaner, re-organize the nodes to split out the common part so > that it can be shared with other SoCs. > > Signed-off-by: Yuantian Tang <andy.tang@nxp.com> > --- > arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 8 +- > arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 8 +- > arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 83 +++----- > arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi | 99 +++++++++ > arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi | 99 +++++++++ > arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi | 99 +++++++++ > arch/arm64/boot/dts/freescale/fsl-tmu.dtsi | 251 > +++++++++++++++++++++++ > 7 files changed, 591 insertions(+), 56 deletions(-) create mode 100644 > arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu.dtsi > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi > b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi > index f9c1d30..8f9788c 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi > @@ -12,7 +12,7 @@ > #include "fsl-ls208xa.dtsi" > > &cpu { > - cpu0: cpu@0 { > + cooling_map0: cpu0: cpu@0 { > device_type = "cpu"; > compatible = "arm,cortex-a57"; > reg = <0x0>; > @@ -32,7 +32,7 @@ > #cooling-cells = <2>; > }; > > - cpu2: cpu@100 { > + cooling_map1: cpu2: cpu@100 { > device_type = "cpu"; > compatible = "arm,cortex-a57"; > reg = <0x100>; > @@ -52,7 +52,7 @@ > #cooling-cells = <2>; > }; > > - cpu4: cpu@200 { > + cooling_map2: cpu4: cpu@200 { > device_type = "cpu"; > compatible = "arm,cortex-a57"; > reg = <0x200>; > @@ -72,7 +72,7 @@ > #cooling-cells = <2>; > }; > > - cpu6: cpu@300 { > + cooling_map3: cpu6: cpu@300 { > device_type = "cpu"; > compatible = "arm,cortex-a57"; > reg = <0x300>; > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi > b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi > index 7c882da..013fe16 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi > @@ -12,7 +12,7 @@ > #include "fsl-ls208xa.dtsi" > > &cpu { > - cpu0: cpu@0 { > + cooling_map0: cpu0: cpu@0 { > device_type = "cpu"; > compatible = "arm,cortex-a72"; > reg = <0x0>; > @@ -32,7 +32,7 @@ > #cooling-cells = <2>; > }; > > - cpu2: cpu@100 { > + cooling_map1: cpu2: cpu@100 { > device_type = "cpu"; > compatible = "arm,cortex-a72"; > reg = <0x100>; > @@ -52,7 +52,7 @@ > #cooling-cells = <2>; > }; > > - cpu4: cpu@200 { > + cooling_map2: cpu4: cpu@200 { > device_type = "cpu"; > compatible = "arm,cortex-a72"; > reg = <0x200>; > @@ -72,7 +72,7 @@ > #cooling-cells = <2>; > }; > > - cpu6: cpu@300 { > + cooling_map3: cpu6: cpu@300 { > device_type = "cpu"; > compatible = "arm,cortex-a72"; > reg = <0x300>; > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi > b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi > index 8cb78dd..4102317 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi > @@ -75,54 +75,7 @@ > mask = <0x2>; > }; > > - thermal-zones { > - cpu_thermal: cpu-thermal { > - polling-delay-passive = <1000>; > - polling-delay = <5000>; > - > - thermal-sensors = <&tmu 4>; > - > - trips { > - cpu_alert: cpu-alert { > - temperature = <75000>; > - hysteresis = <2000>; > - type = "passive"; > - }; > - cpu_crit: cpu-crit { > - temperature = <85000>; > - hysteresis = <2000>; > - type = "critical"; > - }; > - }; > - > - cooling-maps { > - map0 { > - trip = <&cpu_alert>; > - cooling-device = > - <&cpu0 THERMAL_NO_LIMIT > - THERMAL_NO_LIMIT>; > - }; > - map1 { > - trip = <&cpu_alert>; > - cooling-device = > - <&cpu2 THERMAL_NO_LIMIT > - THERMAL_NO_LIMIT>; > - }; > - map2 { > - trip = <&cpu_alert>; > - cooling-device = > - <&cpu4 THERMAL_NO_LIMIT > - THERMAL_NO_LIMIT>; > - }; > - map3 { > - trip = <&cpu_alert>; > - cooling-device = > - <&cpu6 THERMAL_NO_LIMIT > - THERMAL_NO_LIMIT>; > - }; > - }; > - }; > - }; > + #include "fsl-tmu.dtsi" > > timer { > compatible = "arm,armv8-timer"; > @@ -692,6 +645,7 @@ > <0000 0 0 4 &gic 0 0 0 127 4>; > }; > > + > sata0: sata@3200000 { > status = "disabled"; > compatible = "fsl,ls2080a-ahci"; > @@ -758,3 +712,36 @@ > }; > }; > }; > + > +#include "fsl-tmu-map1.dtsi" > +#include "fsl-tmu-map2.dtsi" > +#include "fsl-tmu-map3.dtsi" > +&thermal_zones { > + thermal-zone1 { > + status = "okay"; > + }; > + > + thermal-zone2{ > + status = "okay"; > + }; > + > + thermal-zone3{ > + status = "okay"; > + }; > + > + thermal-zone4{ > + status = "okay"; > + }; > + > + thermal-zone5{ > + status = "okay"; > + }; > + > + thermal-zone6{ > + status = "okay"; > + }; > + > + thermal-zone7 { > + status = "okay"; > + }; > +}; > diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi > b/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi > new file mode 100644 > index 0000000..87e0d2e > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi > @@ -0,0 +1,99 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Device Tree Include file for Thermal Monitor Unit. > + * > + * Copyright 2018 NXP > + * > + * Tang Yuantian <andy.tang@nxp.com> > + * > + */ > + > +&thermal_zones { > + thermal-zone0 { > + cooling-maps { > + map1 { > + trip = <&alert0>; > + cooling-device = > + <&cooling_map1 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone1 { > + cooling-maps { > + map1 { > + trip = <&alert1>; > + cooling-device = > + <&cooling_map1 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone2 { > + cooling-maps { > + map1 { > + trip = <&alert2>; > + cooling-device = > + <&cooling_map1 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone3 { > + cooling-maps { > + map1 { > + trip = <&alert3>; > + cooling-device = > + <&cooling_map1 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone4 { > + cooling-maps { > + map1 { > + trip = <&alert4>; > + cooling-device = > + <&cooling_map1 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone5 { > + cooling-maps { > + map1 { > + trip = <&alert5>; > + cooling-device = > + <&cooling_map1 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone6 { > + cooling-maps { > + map1 { > + trip = <&alert6>; > + cooling-device = > + <&cooling_map1 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone7 { > + cooling-maps { > + map1 { > + trip = <&alert7>; > + cooling-device = > + <&cooling_map1 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > +}; > diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi > b/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi > new file mode 100644 > index 0000000..7e35073 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi > @@ -0,0 +1,99 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Device Tree Include file for Thermal Monitor Unit. > + * > + * Copyright 2018 NXP > + * > + * Tang Yuantian <andy.tang@nxp.com> > + * > + */ > + > +&thermal_zones { > + thermal-zone0 { > + cooling-maps { > + map2 { > + trip = <&alert0>; > + cooling-device = > + <&cooling_map2 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone1 { > + cooling-maps { > + map2 { > + trip = <&alert1>; > + cooling-device = > + <&cooling_map2 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone2 { > + cooling-maps { > + map2 { > + trip = <&alert2>; > + cooling-device = > + <&cooling_map2 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone3 { > + cooling-maps { > + map2 { > + trip = <&alert3>; > + cooling-device = > + <&cooling_map2 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone4 { > + cooling-maps { > + map2 { > + trip = <&alert4>; > + cooling-device = > + <&cooling_map2 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone5 { > + cooling-maps { > + map2 { > + trip = <&alert5>; > + cooling-device = > + <&cooling_map2 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone6 { > + cooling-maps { > + map2 { > + trip = <&alert6>; > + cooling-device = > + <&cooling_map2 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone7 { > + cooling-maps { > + map2 { > + trip = <&alert7>; > + cooling-device = > + <&cooling_map2 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > +}; > diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi > b/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi > new file mode 100644 > index 0000000..dcde943 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi > @@ -0,0 +1,99 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Device Tree Include file for Thermal Monitor Unit. > + * > + * Copyright 2018 NXP > + * > + * Tang Yuantian <andy.tang@nxp.com> > + * > + */ > + > +&thermal_zones { > + thermal-zone0 { > + cooling-maps { > + map3 { > + trip = <&alert0>; > + cooling-device = > + <&cooling_map3 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone1 { > + cooling-maps { > + map3 { > + trip = <&alert1>; > + cooling-device = > + <&cooling_map3 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone2 { > + cooling-maps { > + map3 { > + trip = <&alert2>; > + cooling-device = > + <&cooling_map3 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone3 { > + cooling-maps { > + map3 { > + trip = <&alert3>; > + cooling-device = > + <&cooling_map3 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone4 { > + cooling-maps { > + map3 { > + trip = <&alert4>; > + cooling-device = > + <&cooling_map3 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone5 { > + cooling-maps { > + map3 { > + trip = <&alert5>; > + cooling-device = > + <&cooling_map3 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone6 { > + cooling-maps { > + map3 { > + trip = <&alert6>; > + cooling-device = > + <&cooling_map3 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone7 { > + cooling-maps { > + map3 { > + trip = <&alert7>; > + cooling-device = > + <&cooling_map3 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > +}; > diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi > b/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi > new file mode 100644 > index 0000000..133d2dc > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi > @@ -0,0 +1,251 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Device Tree Include file for Thermal Monitor Unit. > + * > + * Copyright 2018 NXP > + * > + * Tang Yuantian <andy.tang@nxp.com> > + * > + */ > + > +thermal_zones: thermal-zones { > + thermal_zone0: thermal-zone0 { > + polling-delay-passive = <1000>; > + polling-delay = <5000>; > + thermal-sensors = <&tmu 0>; > + status = "disabled"; > + > + trips { > + alert0: alert0 { > + temperature = <75000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + crit0: crit0 { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + map0 { > + trip = <&alert0>; > + cooling-device = > + <&cooling_map0 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone1 { > + polling-delay-passive = <1000>; > + polling-delay = <5000>; > + thermal-sensors = <&tmu 1>; > + status = "disabled"; > + > + trips { > + alert1: alert1 { > + temperature = <75000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + crit1: crit1 { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + map0 { > + trip = <&alert1>; > + cooling-device = > + <&cooling_map0 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone2 { > + polling-delay-passive = <1000>; > + polling-delay = <5000>; > + thermal-sensors = <&tmu 2>; > + status = "disabled"; > + > + trips { > + alert2: alert2 { > + temperature = <75000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + crit2: crit2 { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + map0 { > + trip = <&alert2>; > + cooling-device = > + <&cooling_map0 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone3 { > + polling-delay-passive = <1000>; > + polling-delay = <5000>; > + thermal-sensors = <&tmu 3>; > + status = "disabled"; > + > + trips { > + alert3: alert3 { > + temperature = <75000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + crit3: crit3 { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + map0 { > + trip = <&alert3>; > + cooling-device = > + <&cooling_map0 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone4 { > + polling-delay-passive = <1000>; > + polling-delay = <5000>; > + thermal-sensors = <&tmu 4>; > + status = "disabled"; > + > + trips { > + alert4: alert4 { > + temperature = <75000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + crit4: crit4 { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + map0 { > + trip = <&alert4>; > + cooling-device = > + <&cooling_map0 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone5 { > + polling-delay-passive = <1000>; > + polling-delay = <5000>; > + thermal-sensors = <&tmu 5>; > + status = "disabled"; > + > + trips { > + alert5: alert5 { > + temperature = <75000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + crit5: crit5 { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + map0 { > + trip = <&alert5>; > + cooling-device = > + <&cooling_map0 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone6 { > + polling-delay-passive = <1000>; > + polling-delay = <5000>; > + thermal-sensors = <&tmu 6>; > + status = "disabled"; > + > + trips { > + alert6: alert6 { > + temperature = <75000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + crit6: crit6 { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + map0 { > + trip = <&alert6>; > + cooling-device = > + <&cooling_map0 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + thermal-zone7 { > + polling-delay-passive = <1000>; > + polling-delay = <5000>; > + thermal-sensors = <&tmu 7>; > + status = "disabled"; > + > + trips { > + alert7: alert7 { > + temperature = <75000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + crit7: crit7 { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + map0 { > + trip = <&alert7>; > + cooling-device = > + <&cooling_map0 THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + }; > + }; > + }; > +}; > -- > 1.7.1
On Tue, Dec 18, 2018 at 07:01:32AM +0000, Andy Tang wrote: > Hi, > > PING. > > BR, > Andy > > > -----Original Message----- > > From: Yuantian Tang <andy.tang@nxp.com> > > Sent: 2018年10月31日 12:48 > > To: shawnguo@kernel.org > > Cc: Leo Li <leoyang.li@nxp.com>; robh+dt@kernel.org; mark.rutland@arm.com; > > linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; > > linux-kernel@vger.kernel.org; rui.zhang@intel.com; daniel.lezcano@linaro.org; > > Andy Tang <andy.tang@nxp.com> > > Subject: [PATCH] arm64: dts: nxp: ls208xa: add more thermal zone support > > > > Ls208xa has several thermal sensors. Add all the sensor id to dts to enable > > them. > > > > To make the dts cleaner, re-organize the nodes to split out the common part so > > that it can be shared with other SoCs. > > > > Signed-off-by: Yuantian Tang <andy.tang@nxp.com> Please take a look at patch below. https://patchwork.kernel.org/patch/10685815/ Shawn
> -----Original Message----- > From: Shawn Guo <shawnguo@kernel.org> > Sent: 2018年12月19日 12:08 > To: Andy Tang <andy.tang@nxp.com> > Cc: mark.rutland@arm.com; devicetree@vger.kernel.org; > daniel.lezcano@linaro.org; linux-kernel@vger.kernel.org; Leo Li > <leoyang.li@nxp.com>; robh+dt@kernel.org; rui.zhang@intel.com; > linux-arm-kernel@lists.infradead.org > Subject: Re: [PATCH] arm64: dts: nxp: ls208xa: add more thermal zone support > > On Tue, Dec 18, 2018 at 07:01:32AM +0000, Andy Tang wrote: > > Hi, > > > > PING. > > > > BR, > > Andy > > > > > -----Original Message----- > > > From: Yuantian Tang <andy.tang@nxp.com> > > > Sent: 2018年10月31日 12:48 > > > To: shawnguo@kernel.org > > > Cc: Leo Li <leoyang.li@nxp.com>; robh+dt@kernel.org; > > > mark.rutland@arm.com; linux-arm-kernel@lists.infradead.org; > > > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; > > > rui.zhang@intel.com; daniel.lezcano@linaro.org; Andy Tang > > > <andy.tang@nxp.com> > > > Subject: [PATCH] arm64: dts: nxp: ls208xa: add more thermal zone > > > support > > > > > > Ls208xa has several thermal sensors. Add all the sensor id to dts to > > > enable them. > > > > > > To make the dts cleaner, re-organize the nodes to split out the > > > common part so that it can be shared with other SoCs. > > > > > > Signed-off-by: Yuantian Tang <andy.tang@nxp.com> > > Please take a look at patch below. > > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatch > work.kernel.org%2Fpatch%2F10685815%2F&data=02%7C01%7Candy.tang > %40nxp.com%7C440d607feede45068dc608d66567c978%7C686ea1d3bc2b4c6fa > 92cd99c5c301635%7C0%7C0%7C636807893765936983&sdata=QC%2By9f > mvI42t9eS3LS4YGD23Kqq6EUD0EpIGnDEDhrA%3D&reserved=0 > Thanks, will rebase my patch. BR, Andy > Shawn
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi index f9c1d30..8f9788c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi @@ -12,7 +12,7 @@ #include "fsl-ls208xa.dtsi" &cpu { - cpu0: cpu@0 { + cooling_map0: cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a57"; reg = <0x0>; @@ -32,7 +32,7 @@ #cooling-cells = <2>; }; - cpu2: cpu@100 { + cooling_map1: cpu2: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a57"; reg = <0x100>; @@ -52,7 +52,7 @@ #cooling-cells = <2>; }; - cpu4: cpu@200 { + cooling_map2: cpu4: cpu@200 { device_type = "cpu"; compatible = "arm,cortex-a57"; reg = <0x200>; @@ -72,7 +72,7 @@ #cooling-cells = <2>; }; - cpu6: cpu@300 { + cooling_map3: cpu6: cpu@300 { device_type = "cpu"; compatible = "arm,cortex-a57"; reg = <0x300>; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi index 7c882da..013fe16 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi @@ -12,7 +12,7 @@ #include "fsl-ls208xa.dtsi" &cpu { - cpu0: cpu@0 { + cooling_map0: cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x0>; @@ -32,7 +32,7 @@ #cooling-cells = <2>; }; - cpu2: cpu@100 { + cooling_map1: cpu2: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x100>; @@ -52,7 +52,7 @@ #cooling-cells = <2>; }; - cpu4: cpu@200 { + cooling_map2: cpu4: cpu@200 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x200>; @@ -72,7 +72,7 @@ #cooling-cells = <2>; }; - cpu6: cpu@300 { + cooling_map3: cpu6: cpu@300 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x300>; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi index 8cb78dd..4102317 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi @@ -75,54 +75,7 @@ mask = <0x2>; }; - thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <1000>; - polling-delay = <5000>; - - thermal-sensors = <&tmu 4>; - - trips { - cpu_alert: cpu-alert { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu_crit: cpu-crit { - temperature = <85000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_alert>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - }; - map1 { - trip = <&cpu_alert>; - cooling-device = - <&cpu2 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - }; - map2 { - trip = <&cpu_alert>; - cooling-device = - <&cpu4 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - }; - map3 { - trip = <&cpu_alert>; - cooling-device = - <&cpu6 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - }; - }; - }; - }; + #include "fsl-tmu.dtsi" timer { compatible = "arm,armv8-timer"; @@ -692,6 +645,7 @@ <0000 0 0 4 &gic 0 0 0 127 4>; }; + sata0: sata@3200000 { status = "disabled"; compatible = "fsl,ls2080a-ahci"; @@ -758,3 +712,36 @@ }; }; }; + +#include "fsl-tmu-map1.dtsi" +#include "fsl-tmu-map2.dtsi" +#include "fsl-tmu-map3.dtsi" +&thermal_zones { + thermal-zone1 { + status = "okay"; + }; + + thermal-zone2{ + status = "okay"; + }; + + thermal-zone3{ + status = "okay"; + }; + + thermal-zone4{ + status = "okay"; + }; + + thermal-zone5{ + status = "okay"; + }; + + thermal-zone6{ + status = "okay"; + }; + + thermal-zone7 { + status = "okay"; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi b/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi new file mode 100644 index 0000000..87e0d2e --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Thermal Monitor Unit. + * + * Copyright 2018 NXP + * + * Tang Yuantian <andy.tang@nxp.com> + * + */ + +&thermal_zones { + thermal-zone0 { + cooling-maps { + map1 { + trip = <&alert0>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone1 { + cooling-maps { + map1 { + trip = <&alert1>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone2 { + cooling-maps { + map1 { + trip = <&alert2>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone3 { + cooling-maps { + map1 { + trip = <&alert3>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone4 { + cooling-maps { + map1 { + trip = <&alert4>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone5 { + cooling-maps { + map1 { + trip = <&alert5>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone6 { + cooling-maps { + map1 { + trip = <&alert6>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone7 { + cooling-maps { + map1 { + trip = <&alert7>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi b/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi new file mode 100644 index 0000000..7e35073 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Thermal Monitor Unit. + * + * Copyright 2018 NXP + * + * Tang Yuantian <andy.tang@nxp.com> + * + */ + +&thermal_zones { + thermal-zone0 { + cooling-maps { + map2 { + trip = <&alert0>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone1 { + cooling-maps { + map2 { + trip = <&alert1>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone2 { + cooling-maps { + map2 { + trip = <&alert2>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone3 { + cooling-maps { + map2 { + trip = <&alert3>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone4 { + cooling-maps { + map2 { + trip = <&alert4>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone5 { + cooling-maps { + map2 { + trip = <&alert5>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone6 { + cooling-maps { + map2 { + trip = <&alert6>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone7 { + cooling-maps { + map2 { + trip = <&alert7>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi b/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi new file mode 100644 index 0000000..dcde943 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Thermal Monitor Unit. + * + * Copyright 2018 NXP + * + * Tang Yuantian <andy.tang@nxp.com> + * + */ + +&thermal_zones { + thermal-zone0 { + cooling-maps { + map3 { + trip = <&alert0>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone1 { + cooling-maps { + map3 { + trip = <&alert1>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone2 { + cooling-maps { + map3 { + trip = <&alert2>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone3 { + cooling-maps { + map3 { + trip = <&alert3>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone4 { + cooling-maps { + map3 { + trip = <&alert4>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone5 { + cooling-maps { + map3 { + trip = <&alert5>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone6 { + cooling-maps { + map3 { + trip = <&alert6>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone7 { + cooling-maps { + map3 { + trip = <&alert7>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi b/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi new file mode 100644 index 0000000..133d2dc --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Thermal Monitor Unit. + * + * Copyright 2018 NXP + * + * Tang Yuantian <andy.tang@nxp.com> + * + */ + +thermal_zones: thermal-zones { + thermal_zone0: thermal-zone0 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 0>; + status = "disabled"; + + trips { + alert0: alert0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit0: crit0 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert0>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone1 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 1>; + status = "disabled"; + + trips { + alert1: alert1 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit1: crit1 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert1>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone2 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 2>; + status = "disabled"; + + trips { + alert2: alert2 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit2: crit2 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert2>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone3 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 3>; + status = "disabled"; + + trips { + alert3: alert3 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit3: crit3 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert3>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone4 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 4>; + status = "disabled"; + + trips { + alert4: alert4 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit4: crit4 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert4>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone5 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 5>; + status = "disabled"; + + trips { + alert5: alert5 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit5: crit5 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert5>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone6 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 6>; + status = "disabled"; + + trips { + alert6: alert6 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit6: crit6 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert6>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone7 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 7>; + status = "disabled"; + + trips { + alert7: alert7 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit7: crit7 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert7>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; +};
Ls208xa has several thermal sensors. Add all the sensor id to dts to enable them. To make the dts cleaner, re-organize the nodes to split out the common part so that it can be shared with other SoCs. Signed-off-by: Yuantian Tang <andy.tang@nxp.com> --- arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 8 +- arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 8 +- arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 83 +++----- arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi | 99 +++++++++ arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi | 99 +++++++++ arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi | 99 +++++++++ arch/arm64/boot/dts/freescale/fsl-tmu.dtsi | 251 +++++++++++++++++++++++ 7 files changed, 591 insertions(+), 56 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu.dtsi