From patchwork Tue Nov 6 06:42:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Weiyi Lu X-Patchwork-Id: 10669779 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4EE0717D4 for ; Tue, 6 Nov 2018 06:45:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3832229DA2 for ; Tue, 6 Nov 2018 06:45:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 26E1429DFA; Tue, 6 Nov 2018 06:45:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6EE2229DA2 for ; Tue, 6 Nov 2018 06:45:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=V/Tei5qVfVwfDjDr3pV4K6FY83jmts7KkSl5an6gXGw=; b=H0DH3JkNeFiNPs tA+2aGc5FFdJIVYgr6RrcMeKwvcs9YTymf8M+N9gEznx3uP9Fnq27pqdpa7023c/cSreoYaKQ+XzA LETbki1b4aBFR9C+G/4jlyoJjtxiCxOELTebMsRJ43QDR/6/fPjgSafgzvA2M4CBVjz6Q4Sxg2X7h I+zEOT21v1SsHq5bDuqY7Q0sXXM8OOVMGMLGa+lz4IUqgpQ+I2n+7mHnxSFCG3LiSnw97t0fqvonN tYFfQRM7rBfdOKzpIGRMK9oSuBTXzeU5QRf6r2enO6tk6g3Y0PKEs9MiicuyyweYdMcU/XaCoOU8E rlloo9qkBZO8DAEBCpsg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gJv6v-0005dy-FB; Tue, 06 Nov 2018 06:45:13 +0000 Received: from merlin.infradead.org ([2001:8b0:10b:1231::1]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gJv50-0003aZ-BT; Tue, 06 Nov 2018 06:43:14 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=merlin.20170209; h=Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=7XOeOAFSigotXyVnVKPhhSoZfgva5SjrtXkTH9K+oNc=; b=nFlSQxYuJx6/kP3Uv807biqF3 IGCrpsDdP2CQuoT6Gd8DNX3B01xCgpUFGoBJGMUOw5skWP9VMlnfySBxHRe7RBWz+fKD26t0X71cw oNZH58aCEy2rZLm/Um5T8NJhhYpfw4l69isGbNd4i606VSND1QmeYu2Lk9b74XjJIw72fpVioMbjY PzZjG+RmekgXc/874y6NPrKGbxgrTRIORCqnL+wQNzo8h6xa2Aq4gtAiFs5KqV5QEVZHk5vDE6jjv OZdY+qquzPhBQ2/HZwpLfyrI/lgbtr3qhAJvNUJdlitEQP7CxbC5l91azwb00yMrrMC8ZlamW1UsH 3rynN4eWw==; Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by merlin.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gJv4x-0003gt-G7; Tue, 06 Nov 2018 06:43:12 +0000 X-UUID: fc16a0236992401491b6e2ccf9b3c56a-20181106 X-UUID: fc16a0236992401491b6e2ccf9b3c56a-20181106 Received: from mtkmrs01.mediatek.inc [(172.21.131.159)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1803875044; Tue, 06 Nov 2018 14:42:31 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 6 Nov 2018 14:42:23 +0800 Received: from mtkslt210.mediatek.inc (10.21.14.14) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 6 Nov 2018 14:42:24 +0800 From: Weiyi Lu To: Matthias Brugger , Stephen Boyd , Rob Herring Subject: [PATCH v1 11/11] soc: mediatek: Add MT8183 scpsys support Date: Tue, 6 Nov 2018 14:42:06 +0800 Message-ID: <20181106064206.17535-13-weiyi.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181106064206.17535-1-weiyi.lu@mediatek.com> References: <20181106064206.17535-1-weiyi.lu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 5FA21623F8137E9B202BF141BF5775590CA997607D8D10AD1A4E706D041081662000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181106_014311_969789_AACEBE3A X-CRM114-Status: GOOD ( 14.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: James Liao , Weiyi Lu , srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org, Fan Chen , linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add scpsys driver for MT8183 Signed-off-by: Weiyi Lu --- drivers/soc/mediatek/mtk-scpsys.c | 226 ++++++++++++++++++++++++++++++ 1 file changed, 226 insertions(+) diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c index 80be2e05e4e0..57b9f04a69de 100644 --- a/drivers/soc/mediatek/mtk-scpsys.c +++ b/drivers/soc/mediatek/mtk-scpsys.c @@ -29,6 +29,7 @@ #include #include #include +#include #define MTK_POLL_DELAY_US 10 #define MTK_POLL_TIMEOUT (jiffies_to_usecs(HZ)) @@ -1179,6 +1180,217 @@ static const struct scp_subdomain scp_subdomain_mt8173[] = { {MT8173_POWER_DOMAIN_MFG_2D, MT8173_POWER_DOMAIN_MFG}, }; +/* + * MT8183 power domain support + */ + +static const struct scp_domain_data scp_domain_data_mt8183[] = { + [MT8183_POWER_DOMAIN_AUDIO] = { + .name = "audio", + .sta_mask = PWR_STATUS_AUDIO, + .ctl_offs = 0x0314, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + .basic_clk_name = {"audio"}, + }, + [MT8183_POWER_DOMAIN_CONN] = { + .name = "conn", + .sta_mask = PWR_STATUS_CONN, + .ctl_offs = 0x032c, + .sram_pdn_bits = 0, + .sram_pdn_ack_bits = 0, + .bp_table = { + [0] = BUS_PROT(IFR_TYPE, 0x2a0, 0x2a4, 0, 0x228, + BIT(13) | BIT(14), BIT(13) | BIT(14)), + }, + }, + [MT8183_POWER_DOMAIN_MFG_ASYNC] = { + .name = "mfg_async", + .sta_mask = PWR_STATUS_MFG_ASYNC, + .ctl_offs = 0x0334, + .sram_pdn_bits = 0, + .sram_pdn_ack_bits = 0, + .basic_clk_name = {"mfg"}, + }, + [MT8183_POWER_DOMAIN_MFG] = { + .name = "mfg", + .sta_mask = PWR_STATUS_MFG, + .ctl_offs = 0x0338, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8183_POWER_DOMAIN_MFG_CORE0] = { + .name = "mfg_core0", + .sta_mask = BIT(7), + .ctl_offs = 0x034c, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8183_POWER_DOMAIN_MFG_CORE1] = { + .name = "mfg_core1", + .sta_mask = BIT(20), + .ctl_offs = 0x0310, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8183_POWER_DOMAIN_MFG_2D] = { + .name = "mfg_2d", + .sta_mask = PWR_STATUS_MFG_2D, + .ctl_offs = 0x0348, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_table = { + [0] = BUS_PROT(IFR_TYPE, 0x2a8, 0x2ac, 0, 0x258, + BIT(19) | BIT(20) | BIT(21), + BIT(19) | BIT(20) | BIT(21)), + [1] = BUS_PROT(IFR_TYPE, 0x2a0, 0x2a4, 0, 0x228, + BIT(21) | BIT(22), BIT(21) | BIT(22)), + }, + }, + [MT8183_POWER_DOMAIN_DISP] = { + .name = "disp", + .sta_mask = PWR_STATUS_DISP, + .ctl_offs = 0x030c, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .basic_clk_name = {"mm"}, + .subsys_clk_prefix = "mm", + .bp_table = { + [0] = BUS_PROT(IFR_TYPE, 0x2a8, 0x2ac, 0, 0x258, + BIT(16) | BIT(17), BIT(16) | BIT(17)), + [1] = BUS_PROT(IFR_TYPE, 0x2a0, 0x2a4, 0, 0x228, + BIT(10) | BIT(11), BIT(10) | BIT(11)), + [2] = BUS_PROT(SMI_TYPE, 0x3c4, 0x3c8, 0, 0x3c0, + GENMASK(7, 0), GENMASK(7, 0)), + }, + }, + [MT8183_POWER_DOMAIN_CAM] = { + .name = "cam", + .sta_mask = BIT(25), + .ctl_offs = 0x0344, + .sram_pdn_bits = GENMASK(9, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + .basic_clk_name = {"cam"}, + .subsys_clk_prefix = "cam", + .bp_table = { + [0] = BUS_PROT(IFR_TYPE, 0x2d4, 0x2d8, 0, 0x2ec, + BIT(4) | BIT(5) | BIT(9) | BIT(13), + BIT(4) | BIT(5) | BIT(9) | BIT(13)), + [1] = BUS_PROT(IFR_TYPE, 0x2a0, 0x2a4, 0, 0x228, + BIT(28), BIT(28)), + [2] = BUS_PROT(IFR_TYPE, 0x2d4, 0x2d8, 0, 0x2ec, + BIT(11), 0), + [3] = BUS_PROT(SMI_TYPE, 0x3c4, 0x3c8, 0, 0x3c0, + BIT(3) | BIT(4), BIT(3) | BIT(4)), + }, + }, + [MT8183_POWER_DOMAIN_ISP] = { + .name = "isp", + .sta_mask = PWR_STATUS_ISP, + .ctl_offs = 0x0308, + .sram_pdn_bits = GENMASK(9, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + .basic_clk_name = {"isp"}, + .subsys_clk_prefix = "isp", + .bp_table = { + [0] = BUS_PROT(IFR_TYPE, 0x2d4, 0x2d8, 0, 0x2ec, + BIT(3) | BIT(8), BIT(3) | BIT(8)), + [1] = BUS_PROT(IFR_TYPE, 0x2d4, 0x2d8, 0, 0x2ec, + BIT(10), 0), + [2] = BUS_PROT(SMI_TYPE, 0x3c4, 0x3c8, 0, 0x3c0, + BIT(2), BIT(2)), + }, + }, + [MT8183_POWER_DOMAIN_VDEC] = { + .name = "vdec", + .sta_mask = BIT(31), + .ctl_offs = 0x0300, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_table = { + [0] = BUS_PROT(SMI_TYPE, 0x3c4, 0x3c8, 0, 0x3c0, + BIT(7), BIT(7)), + }, + }, + [MT8183_POWER_DOMAIN_VENC] = { + .name = "venc", + .sta_mask = PWR_STATUS_VENC, + .ctl_offs = 0x0304, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + .bp_table = { + [0] = BUS_PROT(SMI_TYPE, 0x3c4, 0x3c8, 0, 0x3c0, + BIT(1), BIT(1)), + }, + }, + [MT8183_POWER_DOMAIN_VPU_TOP] = { + .name = "vpu_top", + .sta_mask = BIT(26), + .ctl_offs = 0x0324, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .basic_clk_name = {"vpu", "vpu1"}, + .subsys_clk_prefix = "vpu", + .bp_table = { + [0] = BUS_PROT(IFR_TYPE, 0x2d4, 0x2d8, 0, 0x2ec, + GENMASK(9, 6) | BIT(12), + GENMASK(9, 6) | BIT(12)), + [1] = BUS_PROT(IFR_TYPE, 0x2a0, 0x2a4, 0, 0x228, + BIT(27), BIT(27)), + [2] = BUS_PROT(IFR_TYPE, 0x2d4, 0x2d8, 0, 0x2ec, + BIT(10) | BIT(11), BIT(10) | BIT(11)), + [3] = BUS_PROT(SMI_TYPE, 0x3c4, 0x3c8, 0, 0x3c0, + BIT(5) | BIT(6), BIT(5) | BIT(6)), + }, + }, + [MT8183_POWER_DOMAIN_VPU_CORE0] = { + .name = "vpu_core0", + .sta_mask = BIT(27), + .ctl_offs = 0x33c, + .sram_iso_ctrl = true, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + .basic_clk_name = {"vpu2"}, + .bp_table = { + [0] = BUS_PROT(IFR_TYPE, 0x2c4, 0x2c8, 0, 0x2e4, + BIT(6), BIT(6)), + [1] = BUS_PROT(IFR_TYPE, 0x2c4, 0x2c8, 0, 0x2e4, + BIT(0) | BIT(2) | BIT(4), + BIT(0) | BIT(2) | BIT(4)), + }, + }, + [MT8183_POWER_DOMAIN_VPU_CORE1] = { + .name = "vpu_core1", + .sta_mask = BIT(28), + .ctl_offs = 0x0340, + .sram_iso_ctrl = true, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + .basic_clk_name = {"vpu3"}, + .bp_table = { + [0] = BUS_PROT(IFR_TYPE, 0x2c4, 0x2c8, 0, 0x2e4, + BIT(7), BIT(7)), + [1] = BUS_PROT(IFR_TYPE, 0x2c4, 0x2c8, 0, 0x2e4, + BIT(1) | BIT(3) | BIT(5), + BIT(1) | BIT(3) | BIT(5)), + }, + }, +}; + +static const struct scp_subdomain scp_subdomain_mt8183[] = { + {MT8183_POWER_DOMAIN_MFG_ASYNC, MT8183_POWER_DOMAIN_MFG}, + {MT8183_POWER_DOMAIN_MFG, MT8183_POWER_DOMAIN_MFG_2D}, + {MT8183_POWER_DOMAIN_MFG, MT8183_POWER_DOMAIN_MFG_CORE0}, + {MT8183_POWER_DOMAIN_MFG, MT8183_POWER_DOMAIN_MFG_CORE1}, + {MT8183_POWER_DOMAIN_DISP, MT8183_POWER_DOMAIN_CAM}, + {MT8183_POWER_DOMAIN_DISP, MT8183_POWER_DOMAIN_ISP}, + {MT8183_POWER_DOMAIN_DISP, MT8183_POWER_DOMAIN_VDEC}, + {MT8183_POWER_DOMAIN_DISP, MT8183_POWER_DOMAIN_VENC}, + {MT8183_POWER_DOMAIN_DISP, MT8183_POWER_DOMAIN_VPU_TOP}, + {MT8183_POWER_DOMAIN_VPU_TOP, MT8183_POWER_DOMAIN_VPU_CORE0}, + {MT8183_POWER_DOMAIN_VPU_TOP, MT8183_POWER_DOMAIN_VPU_CORE1}, +}; + static const struct scp_soc_data mt2701_data = { .domains = scp_domain_data_mt2701, .num_domains = ARRAY_SIZE(scp_domain_data_mt2701), @@ -1245,6 +1457,17 @@ static const struct scp_soc_data mt8173_data = { .bus_prot_reg_update = true, }; +static const struct scp_soc_data mt8183_data = { + .domains = scp_domain_data_mt8183, + .num_domains = ARRAY_SIZE(scp_domain_data_mt8183), + .subdomains = scp_subdomain_mt8183, + .num_subdomains = ARRAY_SIZE(scp_subdomain_mt8183), + .regs = { + .pwr_sta_offs = 0x0180, + .pwr_sta2nd_offs = 0x0184 + } +}; + /* * scpsys driver init */ @@ -1268,6 +1491,9 @@ static const struct of_device_id of_scpsys_match_tbl[] = { }, { .compatible = "mediatek,mt8173-scpsys", .data = &mt8173_data, + }, { + .compatible = "mediatek,mt8183-scpsys", + .data = &mt8183_data, }, { /* sentinel */ }