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Wed, 14 Nov 2018 01:00:46 -0800 (PST) Received: from lmecxl0911.lme.st.com ([2a04:cec0:1088:2b4c:4d39:8b22:d570:822a]) by smtp.gmail.com with ESMTPSA id n7-v6sm16951441wrt.60.2018.11.14.01.00.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Nov 2018 01:00:45 -0800 (PST) From: Benjamin Gaignard To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, alexandre.torgue@st.com Subject: [PATCH v4 3/4] ARM: dts: stm32: Add hwspinlock node for stm32mp157 SoC Date: Wed, 14 Nov 2018 10:00:26 +0100 Message-Id: <20181114090027.7580-4-benjamin.gaignard@linaro.org> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20181114090027.7580-1-benjamin.gaignard@linaro.org> References: <20181114090027.7580-1-benjamin.gaignard@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181114_010057_712359_9E2F8B39 X-CRM114-Status: GOOD ( 12.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Benjamin Gaignard , linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, Benjamin Gaignard , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Benjamin Gaignard Declare hwspinlock device for stm32mp157 SoC Signed-off-by: Benjamin Gaignard Signed-off-by: Benjamin Gaignard --- arch/arm/boot/dts/stm32mp157c.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index 185541a5b69f..98f824d8b0f0 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -803,6 +803,15 @@ status = "disabled"; }; + hsem: hwspinlock@4c000000 { + compatible = "st,stm32-hwspinlock"; + #hwlock-cells = <1>; + reg = <0x4c000000 0x400>; + clocks = <&rcc HSEM>; + clock-names = "hwsem"; + status = "disabled"; + }; + rcc: rcc@50000000 { compatible = "st,stm32mp1-rcc", "syscon"; reg = <0x50000000 0x1000>;