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[176.137.58.115]) by smtp.gmail.com with ESMTPSA id k5-v6sm50797646wre.82.2018.11.17.03.18.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 17 Nov 2018 03:18:36 -0800 (PST) From: abailon@baylibre.com To: georgi.djakov@linaro.org Subject: [RFC PATCH 2/2] dt-bindings: interconnect: Document imx7ulp interconnect bindings Date: Sat, 17 Nov 2018 12:19:05 +0100 Message-Id: <20181117111905.29091-3-abailon@baylibre.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20181117111905.29091-1-abailon@baylibre.com> References: <20181117111905.29091-1-abailon@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181117_031848_960239_A3484E8B X-CRM114-Status: GOOD ( 12.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexandre Bailon , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Alexandre Bailon This documents the device tree bindings for the interconnects present in the imx7ulp SoC. Signed-off-by: Alexandre Bailon --- .../bindings/interconnect/imx7ulp.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/imx7ulp.txt diff --git a/Documentation/devicetree/bindings/interconnect/imx7ulp.txt b/Documentation/devicetree/bindings/interconnect/imx7ulp.txt new file mode 100644 index 000000000000..c32b7becdca7 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/imx7ulp.txt @@ -0,0 +1,17 @@ +iMX7ULP interconnect driver binding +---------------------------------------------------- + +Required properties : +- compatible : should be "fsl,imx7ulp-icc"; +- #interconnect-cells : should contain 1 +- clocks : list of phandles and specifiers to all interconnect bus clocks +- clock-names : clock names should include both "nic0_div" and "nic1_div" + +Examples: + icc0: icc { + compatible = "fsl,imx7ulp-icc"; + clocks = <&clks IMX7ULP_CLK_NIC0_DIV>, + <&clks IMX7ULP_CLK_NIC1_DIV>; + clock-names = "nic0_div", "nic1_div"; + #interconnect-cells = <1>; + };