@@ -59,14 +59,6 @@
cache-level = <2>;
};
- gic: interrupt-controller@c4301000 {
- compatible = "arm,cortex-a9-gic";
- reg = <0xc4301000 0x1000>,
- <0xc4300100 0x0100>;
- interrupt-controller;
- #interrupt-cells = <3>;
- };
-
soc {
compatible = "simple-bus";
#address-cells = <1>;
@@ -207,6 +199,22 @@
};
};
+ periph: bus@c4300000 {
+ compatible = "simple-bus";
+ reg = <0xc4300000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xc4300000 0x10000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,cortex-a9-gic";
+ reg = <0x1000 0x1000>,
+ <0x100 0x100>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+ };
+
aobus: aobus@c8100000 {
compatible = "simple-bus";
reg = <0xc8100000 0x100000>;
@@ -129,11 +129,6 @@
no-map;
};
};
-
- scu@c4300000 {
- compatible = "arm,cortex-a9-scu";
- reg = <0xc4300000 0x100>;
- };
}; /* end of / */
&aobus {
@@ -362,6 +357,13 @@
arm,shared-override;
};
+&periph {
+ scu@0 {
+ compatible = "arm,cortex-a9-scu";
+ reg = <0x0 0x100>;
+ };
+};
+
&pwm_ab {
compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";
};
@@ -112,11 +112,6 @@
no-map;
};
};
-
- scu@c4300000 {
- compatible = "arm,cortex-a5-scu";
- reg = <0xc4300000 0x100>;
- };
}; /* end of / */
&aobus {
@@ -349,6 +344,13 @@
arm,shared-override;
};
+&periph {
+ scu@0 {
+ compatible = "arm,cortex-a5-scu";
+ reg = <0x0 0x100>;
+ };
+};
+
&pwm_ab {
compatible = "amlogic,meson8b-pwm";
};
The public Meson8b (S805) datasheet describes a memory region called "A9 Periph base" which starts at 0xC4300000 and ends at 0xC430FFFF. Add a simple-bus node and move all peripherals that are part of this memory region. This makes the .dts a bit easier to read. No functional changes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm/boot/dts/meson.dtsi | 24 ++++++++++++++++-------- arch/arm/boot/dts/meson8.dtsi | 12 +++++++----- arch/arm/boot/dts/meson8b.dtsi | 12 +++++++----- 3 files changed, 30 insertions(+), 18 deletions(-)