From patchwork Wed Nov 28 09:30:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 10702149 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1639F13AD for ; Wed, 28 Nov 2018 09:34:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E6F862CC8B for ; Wed, 28 Nov 2018 09:34:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D74912CCD4; Wed, 28 Nov 2018 09:34:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6BFAC2CC8B for ; Wed, 28 Nov 2018 09:34:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Wi7au1xgyICYE56CPHhTMXi6zljNRrlg5UfuBuD0/K8=; b=Ieco/yv9hCBvKx JvxOhLgp+8sIYHiLZP3vUvigkTW5D85ygXgfof+cIC7FJCXuZEQFMet/dUlSdF5Bh1RQVplFI5Ztt Yw7gBsi93JwyMpUFppuJLezqt9VQT+GgPCTHge2jo/PBZHTYaWK5KlfN3sBZDvgVnS8iN4KXSbHUD TM5HGzHPDdtQDJPv7FLSNZd9Mxao6Q+nASbF8zmcjNu0xL26DQbTgc8bQFvjiudoSB7LSTVUFb/yH xXqocB3LMVDBgSSC6snGizDZNUNvbYqcjVZwZ22CN7zQW6MMwBtFZW3Dxdzi1R1b5VJUSkl6aCTny GNTcpv44DYPvpQ5RbKPw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gRwEU-0003NJ-NH; Wed, 28 Nov 2018 09:34:10 +0000 Received: from mirror2.csie.ntu.edu.tw ([140.112.30.76] helo=wens.csie.org) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gRwBL-0008RK-Oh for linux-arm-kernel@lists.infradead.org; Wed, 28 Nov 2018 09:31:08 +0000 Received: by wens.csie.org (Postfix, from userid 1000) id 947BB604F1; Wed, 28 Nov 2018 17:30:28 +0800 (CST) From: Chen-Yu Tsai To: Maxime Ripard , Alexandre Belloni , Alessandro Zummo , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland Subject: [PATCH 12/15] ARM: dts: sunxi: h3/h5: Fix up RTC device node and clock references Date: Wed, 28 Nov 2018 17:30:10 +0800 Message-Id: <20181128093013.24442-14-wens@csie.org> X-Mailer: git-send-email 2.20.0.rc1 In-Reply-To: <20181128093013.24442-1-wens@csie.org> References: <20181128093013.24442-1-wens@csie.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181128_013056_904131_663D4FE9 X-CRM114-Status: GOOD ( 16.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, Chen-Yu Tsai , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The RTC module on the H3 was claimed to be the same as on the A31, when in fact it is not. The A31 does not have an RTC external clock output, and its internal RC oscillator's average clock rate is not in the same range. The H5's RTC has some extra crypto-related registers compared to the H3. Their exact functions are not clear. Also the RTC-VIO regulator has different settings. This patch fixes the compatible string and clock properties to conform to the updated bindings. The device node for the internal oscillator is removed, as it is internalized into the RTC device. Clock references to the IOSC and LOSC are also fixed. Signed-off-by: Chen-Yu Tsai squash! ARM: dts: sunxi: h3/h5: Fix up RTC device node and clock references Acked-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3.dtsi | 4 +++ arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++++++++------------ arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 4 +++ 3 files changed, 18 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 3ecfabb10151..9497d4076e65 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -241,3 +241,7 @@ &pio { compatible = "allwinner,sun8i-h3-pinctrl"; }; + +&rtc { + compatible = "allwinner,sun8i-h3-rtc"; +}; diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index bce3bf1d6ae5..3cc4366c07fd 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -95,15 +95,7 @@ compatible = "fixed-clock"; clock-frequency = <32768>; clock-accuracy = <50000>; - clock-output-names = "osc32k"; - }; - - iosc: internal-osc-clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <16000000>; - clock-accuracy = <300000000>; - clock-output-names = "iosc"; + clock-output-names = "ext_osc32k"; }; }; @@ -377,7 +369,7 @@ ccu: clock@1c20000 { /* compatible is in per SoC .dtsi file */ reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&osc32k>; + clocks = <&osc24M>, <&rtc 0>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -388,7 +380,7 @@ reg = <0x01c20800 0x400>; interrupts = , ; - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; @@ -813,17 +805,19 @@ }; rtc: rtc@1f00000 { - compatible = "allwinner,sun6i-a31-rtc"; - reg = <0x01f00000 0x54>; + /* compatible is in per SoC .dtsi file */ + reg = <0x01f00000 0x400>; interrupts = , ; + clock-output-names = "osc32k", "osc32k-out", "iosc"; + clocks = <&osc32k>; + #clock-cells = <1>; }; r_ccu: clock@1f01400 { compatible = "allwinner,sun8i-h3-r-ccu"; reg = <0x01f01400 0x100>; - clocks = <&osc24M>, <&osc32k>, <&iosc>, - <&ccu 9>; + clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, <&ccu 9>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; #reset-cells = <1>; @@ -861,7 +855,7 @@ compatible = "allwinner,sun8i-h3-r-pinctrl"; reg = <0x01f02c00 0x400>; interrupts = ; - clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>; + clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi index b41dc1aab67d..fe731b35f761 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi @@ -172,3 +172,7 @@ ; compatible = "allwinner,sun50i-h5-pinctrl"; }; + +&rtc { + compatible = "allwinner,sun50i-h5-rtc"; +};