| Message ID | 20181130075849.16941-5-wens@csie.org (mailing list archive) |
|---|---|
| State | Deferred, archived |
| Headers | show |
| Series | media: sun6i: Separate H3 compatible from A31 | expand |
On Fri, Nov 30, 2018 at 1:28 PM Chen-Yu Tsai <wens@csie.org> wrote: > > Some camera modules have the SoC feeding a master clock to the sensor > instead of having a standalone crystal. This clock signal is generated > from the clock control unit and output from the CSI MCLK function of > pin PE1. > > Add a pinmux setting for it for camera sensors to reference. > > Signed-off-by: Chen-Yu Tsai <wens@csie.org> > --- On Fri, Nov 30, 2018 at 1:29 PM Chen-Yu Tsai <wens@csie.org> wrote: > > The CSI controller found on the H3 (and H5) is a reduced version of the > one found on the A31. It only has 1 channel, instead of 4 channels for > time-multiplexed BT.656. Since the H3 is a reduced version, it cannot > "fallback" to a compatible that implements more features than it > supports. > > Drop the A31 fallback compatible. > > Fixes: f89120b6f554 ("ARM: dts: sun8i: Add the H3/H5 CSI controller") > Signed-off-by: Chen-Yu Tsai <wens@csie.org> > --- Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
On Mon, Dec 3, 2018 at 5:46 PM Jagan Teki <jagan@amarulasolutions.com> wrote: > > On Fri, Nov 30, 2018 at 1:28 PM Chen-Yu Tsai <wens@csie.org> wrote: > > > > Some camera modules have the SoC feeding a master clock to the sensor > > instead of having a standalone crystal. This clock signal is generated > > from the clock control unit and output from the CSI MCLK function of > > pin PE1. > > > > Add a pinmux setting for it for camera sensors to reference. > > > > Signed-off-by: Chen-Yu Tsai <wens@csie.org> > > --- > > On Fri, Nov 30, 2018 at 1:29 PM Chen-Yu Tsai <wens@csie.org> wrote: > > > > The CSI controller found on the H3 (and H5) is a reduced version of the > > one found on the A31. It only has 1 channel, instead of 4 channels for > > time-multiplexed BT.656. Since the H3 is a reduced version, it cannot > > "fallback" to a compatible that implements more features than it > > supports. > > > > Drop the A31 fallback compatible. > > > > Fixes: f89120b6f554 ("ARM: dts: sun8i: Add the H3/H5 CSI controller") > > Signed-off-by: Chen-Yu Tsai <wens@csie.org> > > --- > > Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Not merging this one, as there are no boards in tree that directly use this. ChenYu
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index c9c9ec71945f..b70899500825 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -400,6 +400,11 @@ function = "csi"; }; + csi_mclk_pin: csi-mclk { + pins = "PE1"; + function = "csi"; + }; + emac_rgmii_pins: emac0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD7", "PD8", "PD9", "PD10",
Some camera modules have the SoC feeding a master clock to the sensor instead of having a standalone crystal. This clock signal is generated from the clock control unit and output from the CSI MCLK function of pin PE1. Add a pinmux setting for it for camera sensors to reference. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 5 +++++ 1 file changed, 5 insertions(+)