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[24.22.235.96]) by smtp.gmail.com with ESMTPSA id d18sm13837878pfj.47.2018.12.16.15.09.41 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 16 Dec 2018 15:09:42 -0800 (PST) From: Andrey Smirnov To: Lorenzo Pieralisi Subject: [PATCH 3/3] PCI: imx6: Make fallthrough comments more consistent Date: Sun, 16 Dec 2018 15:09:16 -0800 Message-Id: <20181216230916.22982-4-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181216230916.22982-1-andrew.smirnov@gmail.com> References: <20181216230916.22982-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181216_150954_915724_56D4D1AF X-CRM114-Status: GOOD ( 12.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "A.s. Dong" , Richard Zhu , linux-arm-kernel@lists.infradead.org, Andrey Smirnov , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Fabio Estevam , linux-imx@nxp.com, Bjorn Helgaas , Leonard Crestez , Chris Healy , Lucas Stach Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Convert all fallthrough comments to say "fall through", as well as modify their placement to the point where the "break" would normally be. Cc: Bjorn Helgaas Cc: Fabio Estevam Cc: Chris Healy Cc: Lucas Stach Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Suggested-by: Bjorn Helgaas Signed-off-by: Andrey Smirnov --- drivers/pci/controller/dwc/pci-imx6.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 59658577e81d..a0510e185d44 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -362,7 +362,8 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) switch (imx6_pcie->variant) { case IMX7D: - case IMX8MQ: /* FALLTHROUGH */ + /* fall through */ + case IMX8MQ: reset_control_assert(imx6_pcie->pciephy_reset); reset_control_assert(imx6_pcie->apps_reset); break; @@ -415,7 +416,8 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_TEST_POWERDOWN, 0); break; - case IMX6QP: /* FALLTHROUGH */ + case IMX6QP: + /* fall through */ case IMX6Q: /* power up core phy and enable ref clock */ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, @@ -607,7 +609,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_RX_EQ_MASK, IMX6SX_GPR12_PCIE_RX_EQ_2); - /* FALLTHROUGH */ + /* fall through */ default: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6Q_GPR12_PCIE_CTL_2, 0 << 10); @@ -731,7 +733,8 @@ static void imx6_pcie_ltssm_enable(struct device *dev) IMX6Q_GPR12_PCIE_CTL_2); break; case IMX7D: - case IMX8MQ: /* FALLTHROUGH */ + /* fall through */ + case IMX8MQ: reset_control_deassert(imx6_pcie->apps_reset); break; } @@ -1076,7 +1079,8 @@ static int imx6_pcie_probe(struct platform_device *pdev) } break; case IMX8MQ: - case IMX7D: /* FALLTHROUGH */ + /* fall through */ + case IMX7D: imx6_pcie->pciephy_reset = devm_reset_control_get_exclusive(dev, "pciephy"); if (IS_ERR(imx6_pcie->pciephy_reset)) {