From patchwork Tue Dec 18 09:12:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joseph Lo X-Patchwork-Id: 10735213 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 077166C2 for ; Tue, 18 Dec 2018 09:15:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EA2BF2A72E for ; Tue, 18 Dec 2018 09:15:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DEA532A764; Tue, 18 Dec 2018 09:15:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8F3DE2A72E for ; Tue, 18 Dec 2018 09:15:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tNsMa9O8RteW3heU758FhZrdnZ6FAnDFY2+nDJG3jQM=; b=QR9nSu+Rl6m3NK qNqGKqTuHcLccIAy5vpXZfBBwoyXwVZzdqoZlliBtAgSPP+YV4FixPH3GEF3HUAPywXCXMT6sr4+b zvuvL+WDue61L3ej//5PWdc8evW1mylLZCQQXK0pqn7yNbEKpCmUBsJ3WsOj89kSP1CDf3/xIw1JP IwfnqFhkorb6wu0DHqVG5CCLc/WUz1Upxx0C28Id3AdmvkJldO4w38vDyEwQIA+mv3hX2b4ZBlNEz BmQ4RTQ/F4e1B4FKKXBfDrZWMfFbQ8LXxBoWGqzVeJ2vqUSb+C0CTNHl8sCY+eWSBAYxvSJQ21bXW H6+FdPuUMoz4hHztv6dg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gZBTI-0007it-0U; Tue, 18 Dec 2018 09:15:24 +0000 Received: from hqemgate15.nvidia.com ([216.228.121.64]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gZBR9-0004dl-1e for linux-arm-kernel@lists.infradead.org; Tue, 18 Dec 2018 09:13:25 +0000 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 18 Dec 2018 01:12:51 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Tue, 18 Dec 2018 01:12:56 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Tue, 18 Dec 2018 01:12:56 -0800 Received: from HQMAIL112.nvidia.com (172.18.146.18) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 18 Dec 2018 09:12:56 +0000 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL112.nvidia.com (172.18.146.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 18 Dec 2018 09:12:56 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Tue, 18 Dec 2018 09:12:56 +0000 Received: from josephl-linux.nvidia.com (Not Verified[10.19.108.132]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Tue, 18 Dec 2018 01:12:55 -0800 From: Joseph Lo To: Thierry Reding , Peter De Schrijver , Jonathan Hunter Subject: [PATCH V3 04/20] dt-bindings: cpufreq: tegra124: remove cpu_lp clock from required properties Date: Tue, 18 Dec 2018 17:12:16 +0800 Message-ID: <20181218091232.23532-5-josephl@nvidia.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20181218091232.23532-1-josephl@nvidia.com> References: <20181218091232.23532-1-josephl@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1545124371; bh=MGogn6gmC82VxzW8tN2AiGeyYrbzuQHtjEPnjCPReRs=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:X-NVConfidentiality: Content-Transfer-Encoding:Content-Type; b=NJXbBHehspJAW+XoECtVLw/H5J/vHpaq1ytDkB9hRpeI8yL0ZgweqOiFvjG71m7eF vNxQLO2BotlrZZadBg4+FvGnZYpyDIVKElfK8CT1qoB17DlNOJ5iOCFx03g+2RoWKr lFGjMK7LCvyKmY8sO5mcWEw8WczhFcQKLZmFafed2ZP05qj3VVzzGKIRrtT2OpLaCz eGZcOBG6zTxaBCFjNcWmFoCpeovmjr9HVM950uYg9TQp4Nvpoe8T+GgEdGAXsIu4CA iaBk/An/yRMsWPD/LnJXtWlMQwQOQTjB/xi/vRrvzxJZzQ8XCQU37nljvUUSVsO8s7 0GbKL5iXSm42A== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181218_011311_434348_8D587929 X-CRM114-Status: UNSURE ( 9.14 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Joseph Lo Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The cpu_lp clock property is only needed when the CPUfreq driver supports CPU cluster switching. But it was not a design for this driver and it didn't handle that as well. So removing this property. Cc: devicetree@vger.kernel.org Signed-off-by: Joseph Lo Acked-by: Jon Hunter Reviewed-by: Rob Herring --- *V3: - no change *V2: - add ack tag --- .../devicetree/bindings/cpufreq/nvidia,tegra124-cpufreq.txt | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/cpufreq/nvidia,tegra124-cpufreq.txt b/Documentation/devicetree/bindings/cpufreq/nvidia,tegra124-cpufreq.txt index 031545a29caf..03196d5ea515 100644 --- a/Documentation/devicetree/bindings/cpufreq/nvidia,tegra124-cpufreq.txt +++ b/Documentation/devicetree/bindings/cpufreq/nvidia,tegra124-cpufreq.txt @@ -9,7 +9,6 @@ Required properties: See ../clocks/clock-bindings.txt for details. - clock-names: Must include the following entries: - cpu_g: Clock mux for the fast CPU cluster. - - cpu_lp: Clock mux for the low-power CPU cluster. - pll_x: Fast PLL clocksource. - pll_p: Auxiliary PLL used during fast PLL rate changes. - dfll: Fast DFLL clocksource that also automatically scales CPU voltage. @@ -30,11 +29,10 @@ cpus { reg = <0>; clocks = <&tegra_car TEGRA124_CLK_CCLK_G>, - <&tegra_car TEGRA124_CLK_CCLK_LP>, <&tegra_car TEGRA124_CLK_PLL_X>, <&tegra_car TEGRA124_CLK_PLL_P>, <&dfll>; - clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll"; + clock-names = "cpu_g", "pll_x", "pll_p", "dfll"; clock-latency = <300000>; };